Lines Matching refs:adev
244 static int amdgpu_discovery_read_binary_from_sysmem(struct amdgpu_device *adev, uint8_t *binary) in amdgpu_discovery_read_binary_from_sysmem() argument
250 ret = amdgpu_acpi_get_tmr_info(adev, &tmr_offset, &tmr_size); in amdgpu_discovery_read_binary_from_sysmem()
257 discv_regn = memremap(pos, adev->mman.discovery_tmr_size, MEMREMAP_WC); in amdgpu_discovery_read_binary_from_sysmem()
259 memcpy(binary, discv_regn, adev->mman.discovery_tmr_size); in amdgpu_discovery_read_binary_from_sysmem()
270 static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, in amdgpu_discovery_read_binary_from_mem() argument
278 if (!amdgpu_sriov_vf(adev)) { in amdgpu_discovery_read_binary_from_mem()
303 amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, in amdgpu_discovery_read_binary_from_mem()
304 adev->mman.discovery_tmr_size, false); in amdgpu_discovery_read_binary_from_mem()
306 ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary); in amdgpu_discovery_read_binary_from_mem()
310 dev_err(adev->dev, in amdgpu_discovery_read_binary_from_mem()
317 static int amdgpu_discovery_read_binary_from_file(struct amdgpu_device *adev, in amdgpu_discovery_read_binary_from_file() argument
324 r = firmware_request_nowarn(&fw, fw_name, adev->dev); in amdgpu_discovery_read_binary_from_file()
327 dev_err(adev->dev, "can't load firmware \"%s\"\n", fw_name); in amdgpu_discovery_read_binary_from_file()
329 drm_info(&adev->ddev, "Optional firmware \"%s\" was not found\n", fw_name); in amdgpu_discovery_read_binary_from_file()
364 static void amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev) in amdgpu_discovery_harvest_config_quirk() argument
370 if ((amdgpu_ip_version(adev, UVD_HWIP, 1) == IP_VERSION(3, 0, 1)) && in amdgpu_discovery_harvest_config_quirk()
371 (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(10, 3, 2))) { in amdgpu_discovery_harvest_config_quirk()
372 switch (adev->pdev->revision) { in amdgpu_discovery_harvest_config_quirk()
380 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
381 adev->vcn.inst_mask &= ~AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
389 static int amdgpu_discovery_verify_npsinfo(struct amdgpu_device *adev, in amdgpu_discovery_verify_npsinfo() argument
401 (struct nps_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_verify_npsinfo()
404 dev_dbg(adev->dev, "invalid ip discovery nps info table id\n"); in amdgpu_discovery_verify_npsinfo()
408 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_verify_npsinfo()
411 dev_dbg(adev->dev, "invalid nps info data table checksum\n"); in amdgpu_discovery_verify_npsinfo()
418 static const char *amdgpu_discovery_get_fw_name(struct amdgpu_device *adev) in amdgpu_discovery_get_fw_name() argument
423 switch (adev->asic_type) { in amdgpu_discovery_get_fw_name()
429 if (adev->apu_flags & AMD_APU_IS_RAVEN2) in amdgpu_discovery_get_fw_name()
431 else if (adev->apu_flags & AMD_APU_IS_PICASSO) in amdgpu_discovery_get_fw_name()
446 static int amdgpu_discovery_init(struct amdgpu_device *adev) in amdgpu_discovery_init() argument
456 adev->mman.discovery_tmr_size = DISCOVERY_TMR_SIZE; in amdgpu_discovery_init()
457 adev->mman.discovery_bin = kzalloc(adev->mman.discovery_tmr_size, GFP_KERNEL); in amdgpu_discovery_init()
458 if (!adev->mman.discovery_bin) in amdgpu_discovery_init()
462 fw_name = amdgpu_discovery_get_fw_name(adev); in amdgpu_discovery_init()
464 drm_dbg(&adev->ddev, "use ip discovery information from file"); in amdgpu_discovery_init()
465 r = amdgpu_discovery_read_binary_from_file(adev, adev->mman.discovery_bin, fw_name); in amdgpu_discovery_init()
469 drm_dbg(&adev->ddev, "use ip discovery information from memory"); in amdgpu_discovery_init()
471 adev, adev->mman.discovery_bin); in amdgpu_discovery_init()
477 if (!amdgpu_discovery_verify_binary_signature(adev->mman.discovery_bin)) { in amdgpu_discovery_init()
478 dev_err(adev->dev, in amdgpu_discovery_init()
484 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_init()
491 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
493 dev_err(adev->dev, "invalid ip discovery binary checksum\n"); in amdgpu_discovery_init()
504 (struct ip_discovery_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
506 dev_err(adev->dev, "invalid ip discovery data table signature\n"); in amdgpu_discovery_init()
511 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
513 dev_err(adev->dev, "invalid ip discovery data table checksum\n"); in amdgpu_discovery_init()
525 (struct gpu_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
528 dev_err(adev->dev, "invalid ip discovery gc table id\n"); in amdgpu_discovery_init()
533 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
535 dev_err(adev->dev, "invalid gc data table checksum\n"); in amdgpu_discovery_init()
547 (struct harvest_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
550 dev_err(adev->dev, "invalid ip discovery harvest table signature\n"); in amdgpu_discovery_init()
555 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
557 dev_err(adev->dev, "invalid harvest data table checksum\n"); in amdgpu_discovery_init()
569 (struct vcn_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
572 dev_err(adev->dev, "invalid ip discovery vcn table id\n"); in amdgpu_discovery_init()
577 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
579 dev_err(adev->dev, "invalid vcn data table checksum\n"); in amdgpu_discovery_init()
591 (struct mall_info_header *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_init()
594 dev_err(adev->dev, "invalid ip discovery mall table id\n"); in amdgpu_discovery_init()
599 if (!amdgpu_discovery_verify_checksum(adev->mman.discovery_bin + offset, in amdgpu_discovery_init()
601 dev_err(adev->dev, "invalid mall data table checksum\n"); in amdgpu_discovery_init()
610 kfree(adev->mman.discovery_bin); in amdgpu_discovery_init()
611 adev->mman.discovery_bin = NULL; in amdgpu_discovery_init()
614 amdgpu_ras_query_boot_status(adev, 4); in amdgpu_discovery_init()
618 static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev);
620 void amdgpu_discovery_fini(struct amdgpu_device *adev) in amdgpu_discovery_fini() argument
622 amdgpu_discovery_sysfs_fini(adev); in amdgpu_discovery_fini()
623 kfree(adev->mman.discovery_bin); in amdgpu_discovery_fini()
624 adev->mman.discovery_bin = NULL; in amdgpu_discovery_fini()
627 static int amdgpu_discovery_validate_ip(struct amdgpu_device *adev, in amdgpu_discovery_validate_ip() argument
631 dev_err(adev->dev, in amdgpu_discovery_validate_ip()
637 dev_err(adev->dev, in amdgpu_discovery_validate_ip()
646 static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev, in amdgpu_discovery_read_harvest_bit_per_ip() argument
658 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_harvest_bit_per_ip()
659 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_read_harvest_bit_per_ip()
666 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_read_harvest_bit_per_ip()
671 ip = (struct ip *)(adev->mman.discovery_bin + in amdgpu_discovery_read_harvest_bit_per_ip()
675 if (amdgpu_discovery_validate_ip(adev, inst, hw_id)) in amdgpu_discovery_read_harvest_bit_per_ip()
683 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0; in amdgpu_discovery_read_harvest_bit_per_ip()
684 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
686 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
689 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_read_harvest_bit_per_ip()
690 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
692 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
697 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_harvest_bit_per_ip()
710 static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev, in amdgpu_discovery_read_from_harvest_table() argument
720 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_read_from_harvest_table()
724 dev_err(adev->dev, "invalid harvest table offset\n"); in amdgpu_discovery_read_from_harvest_table()
728 harvest_info = (struct harvest_table *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_read_from_harvest_table()
737 adev->vcn.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
739 adev->jpeg.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
742 adev->vcn.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
744 adev->jpeg.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
748 adev->harvest_ip_mask |= AMD_HARVEST_IP_DMU_MASK; in amdgpu_discovery_read_from_harvest_table()
756 adev->gfx.xcc_mask &= in amdgpu_discovery_read_from_harvest_table()
760 adev->sdma.sdma_mask &= in amdgpu_discovery_read_from_harvest_table()
765 adev->isp.harvest_config |= in amdgpu_discovery_read_from_harvest_table()
774 adev->umc.active_mask = ((1 << adev->umc.node_inst_num) - 1) & in amdgpu_discovery_read_from_harvest_table()
1006 struct amdgpu_device *adev; member
1022 struct amdgpu_device *adev = ip_top->adev; in ip_disc_release() local
1024 adev->ip_top = NULL; in ip_disc_release()
1028 static uint8_t amdgpu_discovery_get_harvest_info(struct amdgpu_device *adev, in amdgpu_discovery_get_harvest_info() argument
1036 harvest = ((1 << inst) & adev->vcn.inst_mask) == 0; in amdgpu_discovery_get_harvest_info()
1039 if (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK) in amdgpu_discovery_get_harvest_info()
1046 harvest = ((1 << inst) & adev->gfx.xcc_mask) == 0; in amdgpu_discovery_get_harvest_info()
1049 harvest = ((1 << inst) & adev->sdma.sdma_mask) == 0; in amdgpu_discovery_get_harvest_info()
1058 static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev, in amdgpu_discovery_sysfs_ips() argument
1080 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_sysfs_ips()
1083 if (amdgpu_discovery_validate_ip(adev, inst, hw_id) || in amdgpu_discovery_sysfs_ips()
1136 adev, ip_hw_instance->hw_id, in amdgpu_discovery_sysfs_ips()
1165 static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_recurse() argument
1170 struct kset *die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_recurse()
1175 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_sysfs_recurse()
1176 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_sysfs_recurse()
1186 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_sysfs_recurse()
1212 amdgpu_discovery_sysfs_ips(adev, ip_die_entry, ip_offset, num_ips, !!ihdr->base_addr_64_bit); in amdgpu_discovery_sysfs_recurse()
1218 static int amdgpu_discovery_sysfs_init(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_init() argument
1223 if (!adev->mman.discovery_bin) in amdgpu_discovery_sysfs_init()
1226 adev->ip_top = kzalloc(sizeof(*adev->ip_top), GFP_KERNEL); in amdgpu_discovery_sysfs_init()
1227 if (!adev->ip_top) in amdgpu_discovery_sysfs_init()
1230 adev->ip_top->adev = adev; in amdgpu_discovery_sysfs_init()
1232 res = kobject_init_and_add(&adev->ip_top->kobj, &ip_discovery_ktype, in amdgpu_discovery_sysfs_init()
1233 &adev->dev->kobj, "ip_discovery"); in amdgpu_discovery_sysfs_init()
1239 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_init()
1241 die_kset->kobj.parent = &adev->ip_top->kobj; in amdgpu_discovery_sysfs_init()
1243 res = kset_register(&adev->ip_top->die_kset); in amdgpu_discovery_sysfs_init()
1253 res = amdgpu_discovery_sysfs_recurse(adev); in amdgpu_discovery_sysfs_init()
1257 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_init()
1300 static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev) in amdgpu_discovery_sysfs_fini() argument
1305 die_kset = &adev->ip_top->die_kset; in amdgpu_discovery_sysfs_fini()
1314 kobject_put(&adev->ip_top->die_kset.kobj); in amdgpu_discovery_sysfs_fini()
1315 kobject_put(&adev->ip_top->kobj); in amdgpu_discovery_sysfs_fini()
1320 static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev) in amdgpu_discovery_reg_base_init() argument
1338 r = amdgpu_discovery_init(adev); in amdgpu_discovery_reg_base_init()
1343 adev->gfx.xcc_mask = 0; in amdgpu_discovery_reg_base_init()
1344 adev->sdma.sdma_mask = 0; in amdgpu_discovery_reg_base_init()
1345 adev->vcn.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1346 adev->jpeg.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1347 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_reg_base_init()
1348 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_reg_base_init()
1356 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset); in amdgpu_discovery_reg_base_init()
1370 ip = (struct ip_v4 *)(adev->mman.discovery_bin + ip_offset); in amdgpu_discovery_reg_base_init()
1374 if (amdgpu_discovery_validate_ip(adev, inst, hw_id)) in amdgpu_discovery_reg_base_init()
1393 if (adev->vcn.num_vcn_inst < in amdgpu_discovery_reg_base_init()
1395 adev->vcn.inst[adev->vcn.num_vcn_inst].vcn_config = in amdgpu_discovery_reg_base_init()
1397 adev->vcn.num_vcn_inst++; in amdgpu_discovery_reg_base_init()
1398 adev->vcn.inst_mask |= in amdgpu_discovery_reg_base_init()
1400 adev->jpeg.inst_mask |= in amdgpu_discovery_reg_base_init()
1403 dev_err(adev->dev, "Too many VCN instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1404 adev->vcn.num_vcn_inst + 1, in amdgpu_discovery_reg_base_init()
1413 if (adev->sdma.num_instances < in amdgpu_discovery_reg_base_init()
1415 adev->sdma.num_instances++; in amdgpu_discovery_reg_base_init()
1416 adev->sdma.sdma_mask |= in amdgpu_discovery_reg_base_init()
1419 dev_err(adev->dev, "Too many SDMA instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1420 adev->sdma.num_instances + 1, in amdgpu_discovery_reg_base_init()
1426 if (adev->vpe.num_instances < AMDGPU_MAX_VPE_INSTANCES) in amdgpu_discovery_reg_base_init()
1427 adev->vpe.num_instances++; in amdgpu_discovery_reg_base_init()
1429 dev_err(adev->dev, "Too many VPE instances: %d vs %d\n", in amdgpu_discovery_reg_base_init()
1430 adev->vpe.num_instances + 1, in amdgpu_discovery_reg_base_init()
1435 adev->gmc.num_umc++; in amdgpu_discovery_reg_base_init()
1436 adev->umc.node_inst_num++; in amdgpu_discovery_reg_base_init()
1440 adev->gfx.xcc_mask |= in amdgpu_discovery_reg_base_init()
1474 adev->reg_offset[hw_ip][ip->instance_number] = in amdgpu_discovery_reg_base_init()
1494 adev->ip_versions[hw_ip] in amdgpu_discovery_reg_base_init()
1512 if (wafl_ver && !adev->ip_versions[XGMI_HWIP][0]) in amdgpu_discovery_reg_base_init()
1513 adev->ip_versions[XGMI_HWIP][0] = wafl_ver; in amdgpu_discovery_reg_base_init()
1518 static void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) in amdgpu_discovery_harvest_ip() argument
1526 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_harvest_ip()
1528 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin + in amdgpu_discovery_harvest_ip()
1536 if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 2, 0) && in amdgpu_discovery_harvest_ip()
1538 if ((adev->pdev->device == 0x731E && in amdgpu_discovery_harvest_ip()
1539 (adev->pdev->revision == 0xC6 || in amdgpu_discovery_harvest_ip()
1540 adev->pdev->revision == 0xC7)) || in amdgpu_discovery_harvest_ip()
1541 (adev->pdev->device == 0x7340 && in amdgpu_discovery_harvest_ip()
1542 adev->pdev->revision == 0xC9) || in amdgpu_discovery_harvest_ip()
1543 (adev->pdev->device == 0x7360 && in amdgpu_discovery_harvest_ip()
1544 adev->pdev->revision == 0xC7)) in amdgpu_discovery_harvest_ip()
1545 amdgpu_discovery_read_harvest_bit_per_ip(adev, in amdgpu_discovery_harvest_ip()
1548 amdgpu_discovery_read_from_harvest_table(adev, in amdgpu_discovery_harvest_ip()
1553 amdgpu_discovery_harvest_config_quirk(adev); in amdgpu_discovery_harvest_ip()
1555 if (vcn_harvest_count == adev->vcn.num_vcn_inst) { in amdgpu_discovery_harvest_ip()
1556 adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK; in amdgpu_discovery_harvest_ip()
1557 adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK; in amdgpu_discovery_harvest_ip()
1560 if (umc_harvest_count < adev->gmc.num_umc) { in amdgpu_discovery_harvest_ip()
1561 adev->gmc.num_umc -= umc_harvest_count; in amdgpu_discovery_harvest_ip()
1574 static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) in amdgpu_discovery_get_gfx_info() argument
1580 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_gfx_info()
1585 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_gfx_info()
1591 gc_info = (union gc_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_gfx_info()
1595 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v1.gc_num_se); in amdgpu_discovery_get_gfx_info()
1596 adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->v1.gc_num_wgp0_per_sa) + in amdgpu_discovery_get_gfx_info()
1598 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
1599 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1600 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v1.gc_num_gl2c); in amdgpu_discovery_get_gfx_info()
1601 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v1.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1602 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v1.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1603 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v1.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1604 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v1.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1605 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v1.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1606 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v1.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1607 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v1.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1608 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v1.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1609 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v1.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1610 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v1.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1612 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v1.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1614 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v1_1.gc_num_tcp_per_sa); in amdgpu_discovery_get_gfx_info()
1615 adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v1_1.gc_num_sdp_interface); in amdgpu_discovery_get_gfx_info()
1616 adev->gfx.config.gc_num_tcps = le32_to_cpu(gc_info->v1_1.gc_num_tcps); in amdgpu_discovery_get_gfx_info()
1619 adev->gfx.config.gc_num_tcp_per_wpg = le32_to_cpu(gc_info->v1_2.gc_num_tcp_per_wpg); in amdgpu_discovery_get_gfx_info()
1620 adev->gfx.config.gc_tcp_l1_size = le32_to_cpu(gc_info->v1_2.gc_tcp_l1_size); in amdgpu_discovery_get_gfx_info()
1621 adev->gfx.config.gc_num_sqc_per_wgp = le32_to_cpu(gc_info->v1_2.gc_num_sqc_per_wgp); in amdgpu_discovery_get_gfx_info()
1622 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_instructio… in amdgpu_discovery_get_gfx_info()
1623 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_2.gc_l1_data_cache_size_p… in amdgpu_discovery_get_gfx_info()
1624 adev->gfx.config.gc_gl1c_per_sa = le32_to_cpu(gc_info->v1_2.gc_gl1c_per_sa); in amdgpu_discovery_get_gfx_info()
1625 … adev->gfx.config.gc_gl1c_size_per_instance = le32_to_cpu(gc_info->v1_2.gc_gl1c_size_per_instance); in amdgpu_discovery_get_gfx_info()
1626 adev->gfx.config.gc_gl2c_per_gpu = le32_to_cpu(gc_info->v1_2.gc_gl2c_per_gpu); in amdgpu_discovery_get_gfx_info()
1629 adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v1_3.gc_tcp_size_per_cu); in amdgpu_discovery_get_gfx_info()
1630 adev->gfx.config.gc_tcp_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcp_cache_line_size); in amdgpu_discovery_get_gfx_info()
1631 …adev->gfx.config.gc_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_instruction_cach… in amdgpu_discovery_get_gfx_info()
1632 …adev->gfx.config.gc_instruction_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_instruction_cache_l… in amdgpu_discovery_get_gfx_info()
1633 …adev->gfx.config.gc_scalar_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cach… in amdgpu_discovery_get_gfx_info()
1634 …adev->gfx.config.gc_scalar_data_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cache_l… in amdgpu_discovery_get_gfx_info()
1635 adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v1_3.gc_tcc_size); in amdgpu_discovery_get_gfx_info()
1636 adev->gfx.config.gc_tcc_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcc_cache_line_size); in amdgpu_discovery_get_gfx_info()
1640 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se); in amdgpu_discovery_get_gfx_info()
1641 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gc_info->v2.gc_num_cu_per_sh); in amdgpu_discovery_get_gfx_info()
1642 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v2.gc_num_sh_per_se); in amdgpu_discovery_get_gfx_info()
1643 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1644 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v2.gc_num_tccs); in amdgpu_discovery_get_gfx_info()
1645 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v2.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
1646 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v2.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
1647 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v2.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
1648 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v2.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
1649 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v2.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
1650 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v2.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1651 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v2.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1652 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v2.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1653 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v2.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1654 adev->gfx.config.num_sc_per_sh = le32_to_cpu(gc_info->v2.gc_num_sc_per_se) / in amdgpu_discovery_get_gfx_info()
1656 adev->gfx.config.num_packer_per_sc = le32_to_cpu(gc_info->v2.gc_num_packer_per_sc); in amdgpu_discovery_get_gfx_info()
1658 adev->gfx.config.gc_num_tcp_per_sa = le32_to_cpu(gc_info->v2_1.gc_num_tcp_per_sh); in amdgpu_discovery_get_gfx_info()
1659 adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v2_1.gc_tcp_size_per_cu); in amdgpu_discovery_get_gfx_info()
1660 …adev->gfx.config.gc_num_sdp_interface = le32_to_cpu(gc_info->v2_1.gc_num_sdp_interface); /* per XC… in amdgpu_discovery_get_gfx_info()
1661 adev->gfx.config.gc_num_cu_per_sqc = le32_to_cpu(gc_info->v2_1.gc_num_cu_per_sqc); in amdgpu_discovery_get_gfx_info()
1662 …adev->gfx.config.gc_l1_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_instruction_c… in amdgpu_discovery_get_gfx_info()
1663 …adev->gfx.config.gc_l1_data_cache_size_per_sqc = le32_to_cpu(gc_info->v2_1.gc_scalar_data_cache_si… in amdgpu_discovery_get_gfx_info()
1664 adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v2_1.gc_tcc_size); /* per XCD */ in amdgpu_discovery_get_gfx_info()
1668 dev_err(adev->dev, in amdgpu_discovery_get_gfx_info()
1682 static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) in amdgpu_discovery_get_mall_info() argument
1690 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_mall_info()
1695 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_mall_info()
1701 mall_info = (union mall_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_mall_info()
1709 for (u = 0; u < adev->gmc.num_umc; u++) { in amdgpu_discovery_get_mall_info()
1717 adev->gmc.mall_size = mall_size; in amdgpu_discovery_get_mall_info()
1718 adev->gmc.m_half_use = half_use; in amdgpu_discovery_get_mall_info()
1722 adev->gmc.mall_size = (uint64_t)mall_size_per_umc * adev->gmc.num_umc; in amdgpu_discovery_get_mall_info()
1725 dev_err(adev->dev, in amdgpu_discovery_get_mall_info()
1738 static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev) in amdgpu_discovery_get_vcn_info() argument
1745 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_vcn_info()
1755 if (adev->vcn.num_vcn_inst > VCN_INFO_TABLE_MAX_NUM_INSTANCES) { in amdgpu_discovery_get_vcn_info()
1756 dev_err(adev->dev, "invalid vcn instances\n"); in amdgpu_discovery_get_vcn_info()
1760 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_vcn_info()
1766 vcn_info = (union vcn_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_vcn_info()
1773 for (v = 0; v < adev->vcn.num_vcn_inst; v++) { in amdgpu_discovery_get_vcn_info()
1774 adev->vcn.inst[v].vcn_codec_disable_mask = in amdgpu_discovery_get_vcn_info()
1779 dev_err(adev->dev, in amdgpu_discovery_get_vcn_info()
1792 static int amdgpu_discovery_refresh_nps_info(struct amdgpu_device *adev, in amdgpu_discovery_refresh_nps_info() argument
1802 amdgpu_device_vram_access(adev, pos, &bhdr, sizeof(bhdr), false); in amdgpu_discovery_refresh_nps_info()
1807 amdgpu_device_vram_access(adev, (pos + offset), nps_data, in amdgpu_discovery_refresh_nps_info()
1814 dev_err(adev->dev, "nps data refresh, checksum mismatch\n"); in amdgpu_discovery_refresh_nps_info()
1821 int amdgpu_discovery_get_nps_info(struct amdgpu_device *adev, in amdgpu_discovery_get_nps_info() argument
1837 r = amdgpu_discovery_refresh_nps_info(adev, &nps_data); in amdgpu_discovery_get_nps_info()
1842 if (!adev->mman.discovery_bin) { in amdgpu_discovery_get_nps_info()
1843 dev_err(adev->dev, in amdgpu_discovery_get_nps_info()
1848 bhdr = (struct binary_header *)adev->mman.discovery_bin; in amdgpu_discovery_get_nps_info()
1855 if (amdgpu_discovery_verify_npsinfo(adev, bhdr)) in amdgpu_discovery_get_nps_info()
1859 (union nps_info *)(adev->mman.discovery_bin + offset); in amdgpu_discovery_get_nps_info()
1882 dev_err(adev->dev, "Unhandled NPS info table %d.%d\n", in amdgpu_discovery_get_nps_info()
1891 static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_common_ip_blocks() argument
1894 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_common_ip_blocks()
1906 amdgpu_device_ip_block_add(adev, &vega10_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1921 amdgpu_device_ip_block_add(adev, &nv_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1932 amdgpu_device_ip_block_add(adev, &soc21_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1936 amdgpu_device_ip_block_add(adev, &soc24_common_ip_block); in amdgpu_discovery_set_common_ip_blocks()
1939 dev_err(adev->dev, in amdgpu_discovery_set_common_ip_blocks()
1941 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_common_ip_blocks()
1947 static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_gmc_ip_blocks() argument
1950 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_gmc_ip_blocks()
1962 amdgpu_device_ip_block_add(adev, &gmc_v9_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1977 amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1988 amdgpu_device_ip_block_add(adev, &gmc_v11_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1992 amdgpu_device_ip_block_add(adev, &gmc_v12_0_ip_block); in amdgpu_discovery_set_gmc_ip_blocks()
1995 dev_err(adev->dev, "Failed to add gmc ip block(GC_HWIP:0x%x)\n", in amdgpu_discovery_set_gmc_ip_blocks()
1996 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_gmc_ip_blocks()
2002 static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_ih_ip_blocks() argument
2004 switch (amdgpu_ip_version(adev, OSSSYS_HWIP, 0)) { in amdgpu_discovery_set_ih_ip_blocks()
2010 amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2017 amdgpu_device_ip_block_add(adev, &vega20_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2025 amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2030 amdgpu_device_ip_block_add(adev, &ih_v6_0_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2033 amdgpu_device_ip_block_add(adev, &ih_v6_1_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2036 amdgpu_device_ip_block_add(adev, &ih_v7_0_ip_block); in amdgpu_discovery_set_ih_ip_blocks()
2039 dev_err(adev->dev, in amdgpu_discovery_set_ih_ip_blocks()
2041 amdgpu_ip_version(adev, OSSSYS_HWIP, 0)); in amdgpu_discovery_set_ih_ip_blocks()
2047 static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_psp_ip_blocks() argument
2049 switch (amdgpu_ip_version(adev, MP0_HWIP, 0)) { in amdgpu_discovery_set_psp_ip_blocks()
2051 amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2055 amdgpu_device_ip_block_add(adev, &psp_v10_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2068 amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2071 amdgpu_device_ip_block_add(adev, &psp_v11_0_8_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2075 amdgpu_device_ip_block_add(adev, &psp_v12_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2092 amdgpu_device_ip_block_add(adev, &psp_v13_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2095 amdgpu_device_ip_block_add(adev, &psp_v13_0_4_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2100 amdgpu_device_ip_block_add(adev, &psp_v14_0_ip_block); in amdgpu_discovery_set_psp_ip_blocks()
2103 dev_err(adev->dev, in amdgpu_discovery_set_psp_ip_blocks()
2105 amdgpu_ip_version(adev, MP0_HWIP, 0)); in amdgpu_discovery_set_psp_ip_blocks()
2111 static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_smu_ip_blocks() argument
2113 switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) { in amdgpu_discovery_set_smu_ip_blocks()
2118 if (adev->asic_type == CHIP_ARCTURUS) in amdgpu_discovery_set_smu_ip_blocks()
2119 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2121 amdgpu_device_ip_block_add(adev, &pp_smu_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2133 amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2137 amdgpu_device_ip_block_add(adev, &smu_v12_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2152 amdgpu_device_ip_block_add(adev, &smu_v13_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2160 amdgpu_device_ip_block_add(adev, &smu_v14_0_ip_block); in amdgpu_discovery_set_smu_ip_blocks()
2163 dev_err(adev->dev, in amdgpu_discovery_set_smu_ip_blocks()
2165 amdgpu_ip_version(adev, MP1_HWIP, 0)); in amdgpu_discovery_set_smu_ip_blocks()
2172 static void amdgpu_discovery_set_sriov_display(struct amdgpu_device *adev) in amdgpu_discovery_set_sriov_display() argument
2174 amdgpu_device_set_sriov_virtual_display(adev); in amdgpu_discovery_set_sriov_display()
2175 amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block); in amdgpu_discovery_set_sriov_display()
2179 static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_display_ip_blocks() argument
2181 if (adev->enable_virtual_display) { in amdgpu_discovery_set_display_ip_blocks()
2182 amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block); in amdgpu_discovery_set_display_ip_blocks()
2186 if (!amdgpu_device_has_dc_support(adev)) in amdgpu_discovery_set_display_ip_blocks()
2190 if (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2191 switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2214 if (adev->ip_versions[DCE_HWIP][0] == IP_VERSION(4, 1, 0)) in amdgpu_discovery_set_display_ip_blocks()
2215 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_display_ip_blocks()
2217 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_display_ip_blocks()
2218 amdgpu_discovery_set_sriov_display(adev); in amdgpu_discovery_set_display_ip_blocks()
2220 amdgpu_device_ip_block_add(adev, &dm_ip_block); in amdgpu_discovery_set_display_ip_blocks()
2223 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
2225 amdgpu_ip_version(adev, DCE_HWIP, 0)); in amdgpu_discovery_set_display_ip_blocks()
2228 } else if (amdgpu_ip_version(adev, DCI_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2229 switch (amdgpu_ip_version(adev, DCI_HWIP, 0)) { in amdgpu_discovery_set_display_ip_blocks()
2233 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_display_ip_blocks()
2234 amdgpu_discovery_set_sriov_display(adev); in amdgpu_discovery_set_display_ip_blocks()
2236 amdgpu_device_ip_block_add(adev, &dm_ip_block); in amdgpu_discovery_set_display_ip_blocks()
2239 dev_err(adev->dev, in amdgpu_discovery_set_display_ip_blocks()
2241 amdgpu_ip_version(adev, DCI_HWIP, 0)); in amdgpu_discovery_set_display_ip_blocks()
2249 static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_gc_ip_blocks() argument
2251 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_gc_ip_blocks()
2260 amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2265 amdgpu_device_ip_block_add(adev, &gfx_v9_4_3_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2280 amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2291 amdgpu_device_ip_block_add(adev, &gfx_v11_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2295 amdgpu_device_ip_block_add(adev, &gfx_v12_0_ip_block); in amdgpu_discovery_set_gc_ip_blocks()
2298 dev_err(adev->dev, "Failed to add gfx ip block(GC_HWIP:0x%x)\n", in amdgpu_discovery_set_gc_ip_blocks()
2299 amdgpu_ip_version(adev, GC_HWIP, 0)); in amdgpu_discovery_set_gc_ip_blocks()
2305 static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_sdma_ip_blocks() argument
2307 switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) { in amdgpu_discovery_set_sdma_ip_blocks()
2316 amdgpu_device_ip_block_add(adev, &sdma_v4_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2321 amdgpu_device_ip_block_add(adev, &sdma_v4_4_2_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2327 amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2337 amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2347 amdgpu_device_ip_block_add(adev, &sdma_v6_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2351 amdgpu_device_ip_block_add(adev, &sdma_v7_0_ip_block); in amdgpu_discovery_set_sdma_ip_blocks()
2354 dev_err(adev->dev, in amdgpu_discovery_set_sdma_ip_blocks()
2356 amdgpu_ip_version(adev, SDMA0_HWIP, 0)); in amdgpu_discovery_set_sdma_ip_blocks()
2362 static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_mm_ip_blocks() argument
2364 if (amdgpu_ip_version(adev, VCE_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2365 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2369 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2370 amdgpu_device_ip_block_add(adev, &uvd_v7_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2373 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2375 amdgpu_ip_version(adev, UVD_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks()
2378 switch (amdgpu_ip_version(adev, VCE_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2382 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) in amdgpu_discovery_set_mm_ip_blocks()
2383 amdgpu_device_ip_block_add(adev, &vce_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2386 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2388 amdgpu_ip_version(adev, VCE_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks()
2392 switch (amdgpu_ip_version(adev, UVD_HWIP, 0)) { in amdgpu_discovery_set_mm_ip_blocks()
2395 amdgpu_device_ip_block_add(adev, &vcn_v1_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2400 amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2401 if (!amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_mm_ip_blocks()
2402 amdgpu_device_ip_block_add(adev, &jpeg_v2_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2407 amdgpu_device_ip_block_add(adev, &vcn_v2_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2408 amdgpu_device_ip_block_add(adev, &jpeg_v2_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2411 amdgpu_device_ip_block_add(adev, &vcn_v2_6_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2412 amdgpu_device_ip_block_add(adev, &jpeg_v2_6_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2419 amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2420 if (!amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_mm_ip_blocks()
2421 amdgpu_device_ip_block_add(adev, &jpeg_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2424 amdgpu_device_ip_block_add(adev, &vcn_v3_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2429 amdgpu_device_ip_block_add(adev, &vcn_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2430 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2433 amdgpu_device_ip_block_add(adev, &vcn_v4_0_3_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2434 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_3_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2438 amdgpu_device_ip_block_add(adev, &vcn_v4_0_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2439 amdgpu_device_ip_block_add(adev, &jpeg_v4_0_5_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2442 amdgpu_device_ip_block_add(adev, &vcn_v5_0_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2443 amdgpu_device_ip_block_add(adev, &jpeg_v5_0_0_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2446 amdgpu_device_ip_block_add(adev, &vcn_v5_0_1_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2447 amdgpu_device_ip_block_add(adev, &jpeg_v5_0_1_ip_block); in amdgpu_discovery_set_mm_ip_blocks()
2450 dev_err(adev->dev, in amdgpu_discovery_set_mm_ip_blocks()
2452 amdgpu_ip_version(adev, UVD_HWIP, 0)); in amdgpu_discovery_set_mm_ip_blocks()
2459 static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_mes_ip_blocks() argument
2461 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_mes_ip_blocks()
2471 amdgpu_device_ip_block_add(adev, &mes_v11_0_ip_block); in amdgpu_discovery_set_mes_ip_blocks()
2472 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2473 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2477 amdgpu_device_ip_block_add(adev, &mes_v12_0_ip_block); in amdgpu_discovery_set_mes_ip_blocks()
2478 adev->enable_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2479 adev->enable_mes_kiq = true; in amdgpu_discovery_set_mes_ip_blocks()
2481 adev->enable_uni_mes = true; in amdgpu_discovery_set_mes_ip_blocks()
2489 static void amdgpu_discovery_init_soc_config(struct amdgpu_device *adev) in amdgpu_discovery_init_soc_config() argument
2491 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_init_soc_config()
2495 aqua_vanjaram_init_soc_config(adev); in amdgpu_discovery_init_soc_config()
2502 static int amdgpu_discovery_set_vpe_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_vpe_ip_blocks() argument
2504 switch (amdgpu_ip_version(adev, VPE_HWIP, 0)) { in amdgpu_discovery_set_vpe_ip_blocks()
2508 amdgpu_device_ip_block_add(adev, &vpe_v6_1_ip_block); in amdgpu_discovery_set_vpe_ip_blocks()
2517 static int amdgpu_discovery_set_umsch_mm_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_umsch_mm_ip_blocks() argument
2519 switch (amdgpu_ip_version(adev, VCN_HWIP, 0)) { in amdgpu_discovery_set_umsch_mm_ip_blocks()
2523 amdgpu_device_ip_block_add(adev, &umsch_mm_v4_0_ip_block); in amdgpu_discovery_set_umsch_mm_ip_blocks()
2524 adev->enable_umsch_mm = true; in amdgpu_discovery_set_umsch_mm_ip_blocks()
2534 static int amdgpu_discovery_set_isp_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_isp_ip_blocks() argument
2537 switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) { in amdgpu_discovery_set_isp_ip_blocks()
2539 amdgpu_device_ip_block_add(adev, &isp_v4_1_0_ip_block); in amdgpu_discovery_set_isp_ip_blocks()
2542 amdgpu_device_ip_block_add(adev, &isp_v4_1_1_ip_block); in amdgpu_discovery_set_isp_ip_blocks()
2552 int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) in amdgpu_discovery_set_ip_blocks() argument
2556 switch (adev->asic_type) { in amdgpu_discovery_set_ip_blocks()
2562 amdgpu_discovery_init(adev); in amdgpu_discovery_set_ip_blocks()
2563 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2564 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2565 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2566 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2567 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2568 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2569 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2570 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2571 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2572 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2573 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2574 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 0, 0); in amdgpu_discovery_set_ip_blocks()
2575 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2576 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2577 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2578 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2579 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2580 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2581 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2582 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 0); in amdgpu_discovery_set_ip_blocks()
2589 amdgpu_discovery_init(adev); in amdgpu_discovery_set_ip_blocks()
2590 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2591 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2592 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2593 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2594 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 3, 0); in amdgpu_discovery_set_ip_blocks()
2595 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2596 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2597 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2598 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2599 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2600 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(6, 2, 0); in amdgpu_discovery_set_ip_blocks()
2601 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2602 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2603 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2604 adev->ip_versions[THM_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2605 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 1); in amdgpu_discovery_set_ip_blocks()
2606 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 1); in amdgpu_discovery_set_ip_blocks()
2607 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2608 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2609 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 1); in amdgpu_discovery_set_ip_blocks()
2616 amdgpu_discovery_init(adev); in amdgpu_discovery_set_ip_blocks()
2617 vega10_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2618 adev->sdma.num_instances = 1; in amdgpu_discovery_set_ip_blocks()
2619 adev->vcn.num_vcn_inst = 1; in amdgpu_discovery_set_ip_blocks()
2620 adev->gmc.num_umc = 2; in amdgpu_discovery_set_ip_blocks()
2621 if (adev->apu_flags & AMD_APU_IS_RAVEN2) { in amdgpu_discovery_set_ip_blocks()
2622 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2623 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 2, 0); in amdgpu_discovery_set_ip_blocks()
2624 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2625 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2626 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2627 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 1); in amdgpu_discovery_set_ip_blocks()
2628 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 1); in amdgpu_discovery_set_ip_blocks()
2629 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 5, 0); in amdgpu_discovery_set_ip_blocks()
2630 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2631 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2632 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 1, 0); in amdgpu_discovery_set_ip_blocks()
2633 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2634 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 2, 2); in amdgpu_discovery_set_ip_blocks()
2635 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2636 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 1); in amdgpu_discovery_set_ip_blocks()
2637 adev->ip_versions[ISP_HWIP][0] = IP_VERSION(2, 0, 0); in amdgpu_discovery_set_ip_blocks()
2639 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2640 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2641 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2642 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2643 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2644 adev->ip_versions[DF_HWIP][0] = IP_VERSION(2, 1, 0); in amdgpu_discovery_set_ip_blocks()
2645 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2646 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(7, 0, 0); in amdgpu_discovery_set_ip_blocks()
2647 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2648 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2649 adev->ip_versions[THM_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2650 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2651 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 1, 0); in amdgpu_discovery_set_ip_blocks()
2652 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2653 adev->ip_versions[DCE_HWIP][0] = IP_VERSION(1, 0, 0); in amdgpu_discovery_set_ip_blocks()
2654 adev->ip_versions[ISP_HWIP][0] = IP_VERSION(2, 0, 0); in amdgpu_discovery_set_ip_blocks()
2662 amdgpu_discovery_init(adev); in amdgpu_discovery_set_ip_blocks()
2663 vega20_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2664 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2665 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2666 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2667 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2668 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2669 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2670 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2671 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2672 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 0); in amdgpu_discovery_set_ip_blocks()
2673 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 0); in amdgpu_discovery_set_ip_blocks()
2674 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 1); in amdgpu_discovery_set_ip_blocks()
2675 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2676 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2677 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2678 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2679 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 0); in amdgpu_discovery_set_ip_blocks()
2680 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2681 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(7, 2, 0); in amdgpu_discovery_set_ip_blocks()
2682 adev->ip_versions[VCE_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2683 adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 1, 0); in amdgpu_discovery_set_ip_blocks()
2690 amdgpu_discovery_init(adev); in amdgpu_discovery_set_ip_blocks()
2691 arct_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2692 adev->sdma.num_instances = 8; in amdgpu_discovery_set_ip_blocks()
2693 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2694 adev->gmc.num_umc = 8; in amdgpu_discovery_set_ip_blocks()
2695 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2696 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2697 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2698 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2699 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2700 adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2701 adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2702 adev->ip_versions[SDMA1_HWIP][2] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2703 adev->ip_versions[SDMA1_HWIP][3] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2704 adev->ip_versions[SDMA1_HWIP][4] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2705 adev->ip_versions[SDMA1_HWIP][5] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2706 adev->ip_versions[SDMA1_HWIP][6] = IP_VERSION(4, 2, 2); in amdgpu_discovery_set_ip_blocks()
2707 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 1); in amdgpu_discovery_set_ip_blocks()
2708 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 1); in amdgpu_discovery_set_ip_blocks()
2709 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 1, 2); in amdgpu_discovery_set_ip_blocks()
2710 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 4); in amdgpu_discovery_set_ip_blocks()
2711 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2712 adev->ip_versions[THM_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2713 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 3); in amdgpu_discovery_set_ip_blocks()
2714 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 1); in amdgpu_discovery_set_ip_blocks()
2715 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2716 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 5, 0); in amdgpu_discovery_set_ip_blocks()
2723 amdgpu_discovery_init(adev); in amdgpu_discovery_set_ip_blocks()
2724 aldebaran_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2725 adev->sdma.num_instances = 5; in amdgpu_discovery_set_ip_blocks()
2726 adev->vcn.num_vcn_inst = 2; in amdgpu_discovery_set_ip_blocks()
2727 adev->gmc.num_umc = 4; in amdgpu_discovery_set_ip_blocks()
2728 adev->ip_versions[MMHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2729 adev->ip_versions[ATHUB_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2730 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2731 adev->ip_versions[HDP_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2732 adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2733 adev->ip_versions[SDMA0_HWIP][1] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2734 adev->ip_versions[SDMA0_HWIP][2] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2735 adev->ip_versions[SDMA0_HWIP][3] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2736 adev->ip_versions[SDMA0_HWIP][4] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
2737 adev->ip_versions[DF_HWIP][0] = IP_VERSION(3, 6, 2); in amdgpu_discovery_set_ip_blocks()
2738 adev->ip_versions[NBIO_HWIP][0] = IP_VERSION(7, 4, 4); in amdgpu_discovery_set_ip_blocks()
2739 adev->ip_versions[UMC_HWIP][0] = IP_VERSION(6, 7, 0); in amdgpu_discovery_set_ip_blocks()
2740 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2741 adev->ip_versions[MP1_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2742 adev->ip_versions[THM_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2743 adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
2744 adev->ip_versions[GC_HWIP][0] = IP_VERSION(9, 4, 2); in amdgpu_discovery_set_ip_blocks()
2745 adev->ip_versions[UVD_HWIP][0] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2746 adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 6, 0); in amdgpu_discovery_set_ip_blocks()
2747 adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0); in amdgpu_discovery_set_ip_blocks()
2750 r = amdgpu_discovery_reg_base_init(adev); in amdgpu_discovery_set_ip_blocks()
2752 drm_err(&adev->ddev, "discovery failed: %d\n", r); in amdgpu_discovery_set_ip_blocks()
2756 amdgpu_discovery_harvest_ip(adev); in amdgpu_discovery_set_ip_blocks()
2757 amdgpu_discovery_get_gfx_info(adev); in amdgpu_discovery_set_ip_blocks()
2758 amdgpu_discovery_get_mall_info(adev); in amdgpu_discovery_set_ip_blocks()
2759 amdgpu_discovery_get_vcn_info(adev); in amdgpu_discovery_set_ip_blocks()
2763 amdgpu_discovery_init_soc_config(adev); in amdgpu_discovery_set_ip_blocks()
2764 amdgpu_discovery_sysfs_init(adev); in amdgpu_discovery_set_ip_blocks()
2766 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2775 adev->family = AMDGPU_FAMILY_AI; in amdgpu_discovery_set_ip_blocks()
2780 adev->family = AMDGPU_FAMILY_RV; in amdgpu_discovery_set_ip_blocks()
2791 adev->family = AMDGPU_FAMILY_NV; in amdgpu_discovery_set_ip_blocks()
2794 adev->family = AMDGPU_FAMILY_VGH; in amdgpu_discovery_set_ip_blocks()
2795 adev->apu_flags |= AMD_APU_IS_VANGOGH; in amdgpu_discovery_set_ip_blocks()
2798 adev->family = AMDGPU_FAMILY_YC; in amdgpu_discovery_set_ip_blocks()
2801 adev->family = AMDGPU_FAMILY_GC_10_3_6; in amdgpu_discovery_set_ip_blocks()
2804 adev->family = AMDGPU_FAMILY_GC_10_3_7; in amdgpu_discovery_set_ip_blocks()
2809 adev->family = AMDGPU_FAMILY_GC_11_0_0; in amdgpu_discovery_set_ip_blocks()
2813 adev->family = AMDGPU_FAMILY_GC_11_0_1; in amdgpu_discovery_set_ip_blocks()
2819 adev->family = AMDGPU_FAMILY_GC_11_5_0; in amdgpu_discovery_set_ip_blocks()
2823 adev->family = AMDGPU_FAMILY_GC_12_0_0; in amdgpu_discovery_set_ip_blocks()
2829 switch (amdgpu_ip_version(adev, GC_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2845 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
2852 switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2855 adev->nbio.funcs = &nbio_v6_1_funcs; in amdgpu_discovery_set_ip_blocks()
2856 adev->nbio.hdp_flush_reg = &nbio_v6_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2861 adev->nbio.funcs = &nbio_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
2862 adev->nbio.hdp_flush_reg = &nbio_v7_0_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2867 adev->nbio.funcs = &nbio_v7_4_funcs; in amdgpu_discovery_set_ip_blocks()
2868 adev->nbio.hdp_flush_reg = &nbio_v7_4_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2872 adev->nbio.funcs = &nbio_v7_9_funcs; in amdgpu_discovery_set_ip_blocks()
2873 adev->nbio.hdp_flush_reg = &nbio_v7_9_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2879 adev->nbio.funcs = &nbio_v7_11_funcs; in amdgpu_discovery_set_ip_blocks()
2880 adev->nbio.hdp_flush_reg = &nbio_v7_11_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2887 adev->nbio.funcs = &nbio_v7_2_funcs; in amdgpu_discovery_set_ip_blocks()
2888 adev->nbio.hdp_flush_reg = &nbio_v7_2_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2898 adev->nbio.funcs = &nbio_v2_3_funcs; in amdgpu_discovery_set_ip_blocks()
2899 adev->nbio.hdp_flush_reg = &nbio_v2_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2903 if (amdgpu_sriov_vf(adev)) in amdgpu_discovery_set_ip_blocks()
2904 adev->nbio.funcs = &nbio_v4_3_sriov_funcs; in amdgpu_discovery_set_ip_blocks()
2906 adev->nbio.funcs = &nbio_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2907 adev->nbio.hdp_flush_reg = &nbio_v4_3_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2911 adev->nbio.funcs = &nbio_v7_7_funcs; in amdgpu_discovery_set_ip_blocks()
2912 adev->nbio.hdp_flush_reg = &nbio_v7_7_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2915 adev->nbio.funcs = &nbif_v6_3_1_funcs; in amdgpu_discovery_set_ip_blocks()
2916 adev->nbio.hdp_flush_reg = &nbif_v6_3_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
2922 switch (amdgpu_ip_version(adev, HDP_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2933 adev->hdp.funcs = &hdp_v4_0_funcs; in amdgpu_discovery_set_ip_blocks()
2941 adev->hdp.funcs = &hdp_v5_0_funcs; in amdgpu_discovery_set_ip_blocks()
2944 adev->hdp.funcs = &hdp_v5_2_funcs; in amdgpu_discovery_set_ip_blocks()
2949 adev->hdp.funcs = &hdp_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
2952 adev->hdp.funcs = &hdp_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
2958 switch (amdgpu_ip_version(adev, DF_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2962 adev->df.funcs = &df_v3_6_funcs; in amdgpu_discovery_set_ip_blocks()
2969 adev->df.funcs = &df_v1_7_funcs; in amdgpu_discovery_set_ip_blocks()
2972 adev->df.funcs = &df_v4_3_funcs; in amdgpu_discovery_set_ip_blocks()
2975 adev->df.funcs = &df_v4_6_2_funcs; in amdgpu_discovery_set_ip_blocks()
2979 adev->df.funcs = &df_v4_15_funcs; in amdgpu_discovery_set_ip_blocks()
2985 switch (amdgpu_ip_version(adev, SMUIO_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
2991 adev->smuio.funcs = &smuio_v9_0_funcs; in amdgpu_discovery_set_ip_blocks()
2999 adev->smuio.funcs = &smuio_v11_0_funcs; in amdgpu_discovery_set_ip_blocks()
3009 adev->smuio.funcs = &smuio_v11_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
3012 adev->smuio.funcs = &smuio_v13_0_funcs; in amdgpu_discovery_set_ip_blocks()
3016 adev->smuio.funcs = &smuio_v13_0_3_funcs; in amdgpu_discovery_set_ip_blocks()
3017 if (adev->smuio.funcs->get_pkg_type(adev) == AMDGPU_PKG_TYPE_APU) { in amdgpu_discovery_set_ip_blocks()
3018 adev->flags |= AMD_IS_APU; in amdgpu_discovery_set_ip_blocks()
3025 adev->smuio.funcs = &smuio_v13_0_6_funcs; in amdgpu_discovery_set_ip_blocks()
3028 adev->smuio.funcs = &smuio_v14_0_2_funcs; in amdgpu_discovery_set_ip_blocks()
3034 switch (amdgpu_ip_version(adev, LSDMA_HWIP, 0)) { in amdgpu_discovery_set_ip_blocks()
3039 adev->lsdma.funcs = &lsdma_v6_0_funcs; in amdgpu_discovery_set_ip_blocks()
3043 adev->lsdma.funcs = &lsdma_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
3049 r = amdgpu_discovery_set_common_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3053 r = amdgpu_discovery_set_gmc_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3058 if (amdgpu_sriov_vf(adev)) { in amdgpu_discovery_set_ip_blocks()
3059 r = amdgpu_discovery_set_psp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3062 r = amdgpu_discovery_set_ih_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3066 r = amdgpu_discovery_set_ih_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3070 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
3071 r = amdgpu_discovery_set_psp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3077 if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) { in amdgpu_discovery_set_ip_blocks()
3078 r = amdgpu_discovery_set_smu_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3083 r = amdgpu_discovery_set_display_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3087 r = amdgpu_discovery_set_gc_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3091 r = amdgpu_discovery_set_sdma_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3095 if ((adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT && in amdgpu_discovery_set_ip_blocks()
3096 !amdgpu_sriov_vf(adev)) || in amdgpu_discovery_set_ip_blocks()
3097 (adev->firmware.load_type == AMDGPU_FW_LOAD_RLC_BACKDOOR_AUTO && amdgpu_dpm == 1)) { in amdgpu_discovery_set_ip_blocks()
3098 r = amdgpu_discovery_set_smu_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3103 r = amdgpu_discovery_set_mm_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3107 r = amdgpu_discovery_set_mes_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3111 r = amdgpu_discovery_set_vpe_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3115 r = amdgpu_discovery_set_umsch_mm_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()
3119 r = amdgpu_discovery_set_isp_ip_blocks(adev); in amdgpu_discovery_set_ip_blocks()