Lines Matching refs:rfb

87 					   struct amdgpu_framebuffer *rfb,
1008 static int amdgpu_display_verify_plane(struct amdgpu_framebuffer *rfb, int plane, in amdgpu_display_verify_plane() argument
1013 unsigned int width = rfb->base.width / in amdgpu_display_verify_plane()
1015 unsigned int height = rfb->base.height / in amdgpu_display_verify_plane()
1023 if (rfb->base.pitches[plane] % block_pitch) { in amdgpu_display_verify_plane()
1024 drm_dbg_kms(rfb->base.dev, in amdgpu_display_verify_plane()
1026 rfb->base.pitches[plane], plane, block_pitch); in amdgpu_display_verify_plane()
1029 if (rfb->base.pitches[plane] < min_pitch) { in amdgpu_display_verify_plane()
1030 drm_dbg_kms(rfb->base.dev, in amdgpu_display_verify_plane()
1032 rfb->base.pitches[plane], plane, min_pitch); in amdgpu_display_verify_plane()
1037 if (rfb->base.offsets[plane] % block_size) { in amdgpu_display_verify_plane()
1038 drm_dbg_kms(rfb->base.dev, in amdgpu_display_verify_plane()
1040 rfb->base.offsets[plane], plane, block_size); in amdgpu_display_verify_plane()
1044 size = rfb->base.offsets[plane] + in amdgpu_display_verify_plane()
1045 (uint64_t)rfb->base.pitches[plane] / block_pitch * in amdgpu_display_verify_plane()
1048 if (rfb->base.obj[0]->size < size) { in amdgpu_display_verify_plane()
1049 drm_dbg_kms(rfb->base.dev, in amdgpu_display_verify_plane()
1051 rfb->base.obj[0]->size, size, plane); in amdgpu_display_verify_plane()
1059 static int amdgpu_display_verify_sizes(struct amdgpu_framebuffer *rfb) in amdgpu_display_verify_sizes() argument
1061 const struct drm_format_info *format_info = drm_format_info(rfb->base.format->format); in amdgpu_display_verify_sizes()
1062 uint64_t modifier = rfb->base.modifier; in amdgpu_display_verify_sizes()
1066 if (rfb->base.dev->mode_config.fb_modifiers_not_supported) in amdgpu_display_verify_sizes()
1091 drm_dbg_kms(rfb->base.dev, in amdgpu_display_verify_sizes()
1118 drm_dbg_kms(rfb->base.dev, in amdgpu_display_verify_sizes()
1127 ret = amdgpu_display_verify_plane(rfb, i, format_info, in amdgpu_display_verify_sizes()
1139 ret = amdgpu_display_verify_plane(rfb, i, format_info, in amdgpu_display_verify_sizes()
1154 ret = amdgpu_display_verify_plane(rfb, i, format_info, in amdgpu_display_verify_sizes()
1197 struct amdgpu_framebuffer *rfb, in amdgpu_display_gem_fb_verify_and_init() argument
1205 rfb->base.obj[0] = obj; in amdgpu_display_gem_fb_verify_and_init()
1206 drm_helper_mode_fill_fb_struct(dev, &rfb->base, info, mode_cmd); in amdgpu_display_gem_fb_verify_and_init()
1218 ret = amdgpu_display_framebuffer_init(dev, rfb, mode_cmd, obj); in amdgpu_display_gem_fb_verify_and_init()
1223 ret = drm_framebuffer_init(dev, &rfb->base, in amdgpu_display_gem_fb_verify_and_init()
1226 ret = drm_framebuffer_init(dev, &rfb->base, &amdgpu_fb_funcs); in amdgpu_display_gem_fb_verify_and_init()
1234 rfb->base.obj[0] = NULL; in amdgpu_display_gem_fb_verify_and_init()
1239 struct amdgpu_framebuffer *rfb, in amdgpu_display_framebuffer_init() argument
1250 for (i = 1; i < rfb->base.format->num_planes; ++i) { in amdgpu_display_framebuffer_init()
1259 ret = amdgpu_display_get_fb_info(rfb, &rfb->tiling_flags, &rfb->tmz_surface, in amdgpu_display_framebuffer_init()
1260 &rfb->gfx12_dcc); in amdgpu_display_framebuffer_init()
1267 ret = check_tiling_flags_gfx6(rfb); in amdgpu_display_framebuffer_init()
1273 !(rfb->base.flags & DRM_MODE_FB_MODIFIERS)) { in amdgpu_display_framebuffer_init()
1275 ret = convert_tiling_flags_to_modifier_gfx12(rfb); in amdgpu_display_framebuffer_init()
1277 ret = convert_tiling_flags_to_modifier(rfb); in amdgpu_display_framebuffer_init()
1281 rfb->tiling_flags); in amdgpu_display_framebuffer_init()
1286 ret = amdgpu_display_verify_sizes(rfb); in amdgpu_display_framebuffer_init()
1290 for (i = 0; i < rfb->base.format->num_planes; ++i) { in amdgpu_display_framebuffer_init()
1291 drm_gem_object_get(rfb->base.obj[0]); in amdgpu_display_framebuffer_init()
1292 rfb->base.obj[i] = rfb->base.obj[0]; in amdgpu_display_framebuffer_init()