Lines Matching refs:ih
42 int amdgpu_ih_ring_init(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, in amdgpu_ih_ring_init() argument
51 ih->ring_size = ring_size; in amdgpu_ih_ring_init()
52 ih->ptr_mask = ih->ring_size - 1; in amdgpu_ih_ring_init()
53 ih->rptr = 0; in amdgpu_ih_ring_init()
54 ih->use_bus_addr = use_bus_addr; in amdgpu_ih_ring_init()
59 if (ih->ring) in amdgpu_ih_ring_init()
65 ih->ring = dma_alloc_coherent(adev->dev, ih->ring_size + 8, in amdgpu_ih_ring_init()
67 if (ih->ring == NULL) in amdgpu_ih_ring_init()
70 ih->gpu_addr = dma_addr; in amdgpu_ih_ring_init()
71 ih->wptr_addr = dma_addr + ih->ring_size; in amdgpu_ih_ring_init()
72 ih->wptr_cpu = &ih->ring[ih->ring_size / 4]; in amdgpu_ih_ring_init()
73 ih->rptr_addr = dma_addr + ih->ring_size + 4; in amdgpu_ih_ring_init()
74 ih->rptr_cpu = &ih->ring[(ih->ring_size / 4) + 1]; in amdgpu_ih_ring_init()
88 r = amdgpu_bo_create_kernel(adev, ih->ring_size, PAGE_SIZE, in amdgpu_ih_ring_init()
90 &ih->ring_obj, &ih->gpu_addr, in amdgpu_ih_ring_init()
91 (void **)&ih->ring); in amdgpu_ih_ring_init()
98 ih->wptr_addr = adev->wb.gpu_addr + wptr_offs * 4; in amdgpu_ih_ring_init()
99 ih->wptr_cpu = &adev->wb.wb[wptr_offs]; in amdgpu_ih_ring_init()
100 ih->rptr_addr = adev->wb.gpu_addr + rptr_offs * 4; in amdgpu_ih_ring_init()
101 ih->rptr_cpu = &adev->wb.wb[rptr_offs]; in amdgpu_ih_ring_init()
104 init_waitqueue_head(&ih->wait_process); in amdgpu_ih_ring_init()
117 void amdgpu_ih_ring_fini(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) in amdgpu_ih_ring_fini() argument
120 if (!ih->ring) in amdgpu_ih_ring_fini()
123 if (ih->use_bus_addr) { in amdgpu_ih_ring_fini()
128 dma_free_coherent(adev->dev, ih->ring_size + 8, in amdgpu_ih_ring_fini()
129 (void *)ih->ring, ih->gpu_addr); in amdgpu_ih_ring_fini()
130 ih->ring = NULL; in amdgpu_ih_ring_fini()
132 amdgpu_bo_free_kernel(&ih->ring_obj, &ih->gpu_addr, in amdgpu_ih_ring_fini()
133 (void **)&ih->ring); in amdgpu_ih_ring_fini()
134 amdgpu_device_wb_free(adev, (ih->wptr_addr - ih->gpu_addr) / 4); in amdgpu_ih_ring_fini()
135 amdgpu_device_wb_free(adev, (ih->rptr_addr - ih->gpu_addr) / 4); in amdgpu_ih_ring_fini()
150 void amdgpu_ih_ring_write(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih, in amdgpu_ih_ring_write() argument
153 uint32_t wptr = le32_to_cpu(*ih->wptr_cpu) >> 2; in amdgpu_ih_ring_write()
157 ih->ring[wptr++] = cpu_to_le32(iv[i]); in amdgpu_ih_ring_write()
160 wptr &= ih->ptr_mask; in amdgpu_ih_ring_write()
163 if (wptr != READ_ONCE(ih->rptr)) { in amdgpu_ih_ring_write()
165 WRITE_ONCE(*ih->wptr_cpu, cpu_to_le32(wptr)); in amdgpu_ih_ring_write()
168 wptr, ih->rptr); in amdgpu_ih_ring_write()
181 struct amdgpu_ih_ring *ih) in amdgpu_ih_wait_on_checkpoint_process_ts() argument
187 if (!ih->enabled || adev->shutdown) in amdgpu_ih_wait_on_checkpoint_process_ts()
190 checkpoint_wptr = amdgpu_ih_get_wptr(adev, ih); in amdgpu_ih_wait_on_checkpoint_process_ts()
193 checkpoint_ts = amdgpu_ih_decode_iv_ts(adev, ih, checkpoint_wptr, -1); in amdgpu_ih_wait_on_checkpoint_process_ts()
195 return wait_event_interruptible_timeout(ih->wait_process, in amdgpu_ih_wait_on_checkpoint_process_ts()
196 amdgpu_ih_ts_after(checkpoint_ts, ih->processed_timestamp) || in amdgpu_ih_wait_on_checkpoint_process_ts()
197 ih->rptr == amdgpu_ih_get_wptr(adev, ih), timeout); in amdgpu_ih_wait_on_checkpoint_process_ts()
209 int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) in amdgpu_ih_process() argument
214 if (!ih->enabled || adev->shutdown) in amdgpu_ih_process()
217 wptr = amdgpu_ih_get_wptr(adev, ih); in amdgpu_ih_process()
221 dev_dbg(adev->dev, "%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr); in amdgpu_ih_process()
226 while (ih->rptr != wptr && --count) { in amdgpu_ih_process()
227 amdgpu_irq_dispatch(adev, ih); in amdgpu_ih_process()
228 ih->rptr &= ih->ptr_mask; in amdgpu_ih_process()
231 if (!ih->overflow) in amdgpu_ih_process()
232 amdgpu_ih_set_rptr(adev, ih); in amdgpu_ih_process()
234 wake_up_all(&ih->wait_process); in amdgpu_ih_process()
237 wptr = amdgpu_ih_get_wptr(adev, ih); in amdgpu_ih_process()
238 if (wptr != ih->rptr) in amdgpu_ih_process()
239 if (!ih->overflow) in amdgpu_ih_process()
242 if (ih->overflow) in amdgpu_ih_process()
264 struct amdgpu_ih_ring *ih, in amdgpu_ih_decode_iv_helper() argument
268 u32 ring_index = ih->rptr >> 2; in amdgpu_ih_decode_iv_helper()
271 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); in amdgpu_ih_decode_iv_helper()
272 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); in amdgpu_ih_decode_iv_helper()
273 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); in amdgpu_ih_decode_iv_helper()
274 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); in amdgpu_ih_decode_iv_helper()
275 dw[4] = le32_to_cpu(ih->ring[ring_index + 4]); in amdgpu_ih_decode_iv_helper()
276 dw[5] = le32_to_cpu(ih->ring[ring_index + 5]); in amdgpu_ih_decode_iv_helper()
277 dw[6] = le32_to_cpu(ih->ring[ring_index + 6]); in amdgpu_ih_decode_iv_helper()
278 dw[7] = le32_to_cpu(ih->ring[ring_index + 7]); in amdgpu_ih_decode_iv_helper()
295 ih->rptr += 32; in amdgpu_ih_decode_iv_helper()
298 uint64_t amdgpu_ih_decode_iv_ts_helper(struct amdgpu_ih_ring *ih, u32 rptr, in amdgpu_ih_decode_iv_ts_helper() argument
306 ring_index = (rptr & ih->ptr_mask) >> 2; in amdgpu_ih_decode_iv_ts_helper()
308 dw1 = le32_to_cpu(ih->ring[ring_index + 1]); in amdgpu_ih_decode_iv_ts_helper()
309 dw2 = le32_to_cpu(ih->ring[ring_index + 2]); in amdgpu_ih_decode_iv_ts_helper()
313 const char *amdgpu_ih_ring_name(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih) in amdgpu_ih_ring_name() argument
315 return ih == &adev->irq.ih ? "ih" : ih == &adev->irq.ih_soft ? "sw ih" : in amdgpu_ih_ring_name()
316 ih == &adev->irq.ih1 ? "ih1" : ih == &adev->irq.ih2 ? "ih2" : "unknown"; in amdgpu_ih_ring_name()