Lines Matching refs:op_input
371 struct mes_misc_op_input op_input; in amdgpu_mes_rreg() local
383 op_input.op = MES_MISC_OP_READ_REG; in amdgpu_mes_rreg()
384 op_input.read_reg.reg_offset = reg; in amdgpu_mes_rreg()
385 op_input.read_reg.buffer_addr = read_val_gpu_addr; in amdgpu_mes_rreg()
393 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_rreg()
409 struct mes_misc_op_input op_input; in amdgpu_mes_wreg() local
412 op_input.op = MES_MISC_OP_WRITE_REG; in amdgpu_mes_wreg()
413 op_input.write_reg.reg_offset = reg; in amdgpu_mes_wreg()
414 op_input.write_reg.reg_value = val; in amdgpu_mes_wreg()
423 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_wreg()
436 struct mes_misc_op_input op_input; in amdgpu_mes_reg_write_reg_wait() local
439 op_input.op = MES_MISC_OP_WRM_REG_WR_WAIT; in amdgpu_mes_reg_write_reg_wait()
440 op_input.wrm_reg.reg0 = reg0; in amdgpu_mes_reg_write_reg_wait()
441 op_input.wrm_reg.reg1 = reg1; in amdgpu_mes_reg_write_reg_wait()
442 op_input.wrm_reg.ref = ref; in amdgpu_mes_reg_write_reg_wait()
443 op_input.wrm_reg.mask = mask; in amdgpu_mes_reg_write_reg_wait()
452 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_reg_write_reg_wait()
468 struct mes_misc_op_input op_input = {0}; in amdgpu_mes_set_shader_debugger() local
477 op_input.op = MES_MISC_OP_SET_SHADER_DEBUGGER; in amdgpu_mes_set_shader_debugger()
478 op_input.set_shader_debugger.process_context_addr = process_context_addr; in amdgpu_mes_set_shader_debugger()
479 op_input.set_shader_debugger.flags.u32all = flags; in amdgpu_mes_set_shader_debugger()
482 if (op_input.set_shader_debugger.flags.process_ctx_flush) in amdgpu_mes_set_shader_debugger()
485 op_input.set_shader_debugger.spi_gdbg_per_vmid_cntl = spi_gdbg_per_vmid_cntl; in amdgpu_mes_set_shader_debugger()
486 memcpy(op_input.set_shader_debugger.tcp_watch_cntl, tcp_watch_cntl, in amdgpu_mes_set_shader_debugger()
487 sizeof(op_input.set_shader_debugger.tcp_watch_cntl)); in amdgpu_mes_set_shader_debugger()
491 op_input.set_shader_debugger.trap_en = trap_en; in amdgpu_mes_set_shader_debugger()
495 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_set_shader_debugger()
507 struct mes_misc_op_input op_input = {0}; in amdgpu_mes_flush_shader_debugger() local
516 op_input.op = MES_MISC_OP_SET_SHADER_DEBUGGER; in amdgpu_mes_flush_shader_debugger()
517 op_input.set_shader_debugger.process_context_addr = process_context_addr; in amdgpu_mes_flush_shader_debugger()
518 op_input.set_shader_debugger.flags.process_ctx_flush = true; in amdgpu_mes_flush_shader_debugger()
522 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_flush_shader_debugger()
638 struct mes_misc_op_input op_input = {0}; in amdgpu_mes_set_enforce_isolation() local
641 op_input.op = MES_MISC_OP_CHANGE_CONFIG; in amdgpu_mes_set_enforce_isolation()
642 op_input.change_config.option.limit_single_process = enable ? 1 : 0; in amdgpu_mes_set_enforce_isolation()
651 r = adev->mes.funcs->misc_op(&adev->mes, &op_input); in amdgpu_mes_set_enforce_isolation()