Lines Matching refs:mode_info
163 if (crtc >= adev->mode_info.num_crtc) in dce_v6_0_vblank_get_counter()
174 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v6_0_pageflip_interrupt_init()
183 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v6_0_pageflip_interrupt_fini()
204 struct amdgpu_crtc *amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; in dce_v6_0_page_flip()
226 if ((crtc < 0) || (crtc >= adev->mode_info.num_crtc)) in dce_v6_0_crtc_get_scanoutpos()
249 if (hpd >= adev->mode_info.num_hpd) in dce_v6_0_hpd_sense()
273 if (hpd >= adev->mode_info.num_hpd) in dce_v6_0_hpd_set_polarity()
289 if (hpd >= adev->mode_info.num_hpd) { in dce_v6_0_hpd_int_ack()
318 if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) in dce_v6_0_hpd_init()
364 if (amdgpu_connector->hpd.hpd >= adev->mode_info.num_hpd) in dce_v6_0_hpd_fini()
387 for (i = 0; i < adev->mode_info.num_crtc; i++) { in dce_v6_0_is_display_hung()
395 for (i = 0; i < adev->mode_info.num_crtc; i++) { in dce_v6_0_is_display_hung()
970 (adev->mode_info.disp_priority == 2)) { in dce_v6_0_program_watermarks()
978 (adev->mode_info.disp_priority == 2)) { in dce_v6_0_program_watermarks()
1133 if (!adev->mode_info.mode_config_initialized) in dce_v6_0_bandwidth_update()
1138 for (i = 0; i < adev->mode_info.num_crtc; i++) { in dce_v6_0_bandwidth_update()
1139 if (adev->mode_info.crtcs[i]->base.enabled) in dce_v6_0_bandwidth_update()
1142 for (i = 0; i < adev->mode_info.num_crtc; i += 2) { in dce_v6_0_bandwidth_update()
1143 mode0 = &adev->mode_info.crtcs[i]->base.mode; in dce_v6_0_bandwidth_update()
1144 mode1 = &adev->mode_info.crtcs[i+1]->base.mode; in dce_v6_0_bandwidth_update()
1145 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i], mode0, mode1); in dce_v6_0_bandwidth_update()
1146 dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i], lb_size, num_heads); in dce_v6_0_bandwidth_update()
1147 lb_size = dce_v6_0_line_buffer_adjust(adev, adev->mode_info.crtcs[i+1], mode1, mode0); in dce_v6_0_bandwidth_update()
1148 dce_v6_0_program_watermarks(adev, adev->mode_info.crtcs[i+1], lb_size, num_heads); in dce_v6_0_bandwidth_update()
1157 for (i = 0; i < adev->mode_info.audio.num_pins; i++) { in dce_v6_0_audio_get_connected_pins()
1158 tmp = RREG32_AUDIO_ENDPT(adev->mode_info.audio.pin[i].offset, in dce_v6_0_audio_get_connected_pins()
1162 adev->mode_info.audio.pin[i].connected = false; in dce_v6_0_audio_get_connected_pins()
1164 adev->mode_info.audio.pin[i].connected = true; in dce_v6_0_audio_get_connected_pins()
1175 for (i = 0; i < adev->mode_info.audio.num_pins; i++) { in dce_v6_0_audio_get_pin()
1176 if (adev->mode_info.audio.pin[i].connected) in dce_v6_0_audio_get_pin()
1177 return &adev->mode_info.audio.pin[i]; in dce_v6_0_audio_get_pin()
1421 adev->mode_info.audio.enabled = true; in dce_v6_0_audio_init()
1428 adev->mode_info.audio.num_pins = 6; in dce_v6_0_audio_init()
1431 adev->mode_info.audio.num_pins = 2; in dce_v6_0_audio_init()
1435 for (i = 0; i < adev->mode_info.audio.num_pins; i++) { in dce_v6_0_audio_init()
1436 adev->mode_info.audio.pin[i].channels = -1; in dce_v6_0_audio_init()
1437 adev->mode_info.audio.pin[i].rate = -1; in dce_v6_0_audio_init()
1438 adev->mode_info.audio.pin[i].bits_per_sample = -1; in dce_v6_0_audio_init()
1439 adev->mode_info.audio.pin[i].status_bits = 0; in dce_v6_0_audio_init()
1440 adev->mode_info.audio.pin[i].category_code = 0; in dce_v6_0_audio_init()
1441 adev->mode_info.audio.pin[i].connected = false; in dce_v6_0_audio_init()
1442 adev->mode_info.audio.pin[i].offset = pin_offsets[i]; in dce_v6_0_audio_init()
1443 adev->mode_info.audio.pin[i].id = i; in dce_v6_0_audio_init()
1446 dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); in dce_v6_0_audio_init()
1459 if (!adev->mode_info.audio.enabled) in dce_v6_0_audio_fini()
1462 for (i = 0; i < adev->mode_info.audio.num_pins; i++) in dce_v6_0_audio_fini()
1463 dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); in dce_v6_0_audio_fini()
1465 adev->mode_info.audio.enabled = false; in dce_v6_0_audio_fini()
1822 for (i = 0; i < adev->mode_info.num_dig; i++) in dce_v6_0_afmt_init()
1823 adev->mode_info.afmt[i] = NULL; in dce_v6_0_afmt_init()
1826 for (i = 0; i < adev->mode_info.num_dig; i++) { in dce_v6_0_afmt_init()
1827 adev->mode_info.afmt[i] = kzalloc(sizeof(struct amdgpu_afmt), GFP_KERNEL); in dce_v6_0_afmt_init()
1828 if (adev->mode_info.afmt[i]) { in dce_v6_0_afmt_init()
1829 adev->mode_info.afmt[i]->offset = dig_offsets[i]; in dce_v6_0_afmt_init()
1830 adev->mode_info.afmt[i]->id = i; in dce_v6_0_afmt_init()
1833 kfree(adev->mode_info.afmt[j]); in dce_v6_0_afmt_init()
1834 adev->mode_info.afmt[j] = NULL; in dce_v6_0_afmt_init()
1847 for (i = 0; i < adev->mode_info.num_dig; i++) { in dce_v6_0_afmt_fini()
1848 kfree(adev->mode_info.afmt[i]); in dce_v6_0_afmt_fini()
1849 adev->mode_info.afmt[i] = NULL; in dce_v6_0_afmt_fini()
2546 for (i = 0; i < adev->mode_info.num_crtc; i++) { in dce_v6_0_crtc_disable()
2547 if (adev->mode_info.crtcs[i] && in dce_v6_0_crtc_disable()
2548 adev->mode_info.crtcs[i]->enabled && in dce_v6_0_crtc_disable()
2550 amdgpu_crtc->pll_id == adev->mode_info.crtcs[i]->pll_id) { in dce_v6_0_crtc_disable()
2696 adev->mode_info.crtcs[index] = amdgpu_crtc; in dce_v6_0_crtc_init()
2724 adev->mode_info.num_crtc = dce_v6_0_get_num_crtc(adev); in dce_v6_0_early_init()
2730 adev->mode_info.num_hpd = 6; in dce_v6_0_early_init()
2731 adev->mode_info.num_dig = 6; in dce_v6_0_early_init()
2734 adev->mode_info.num_hpd = 2; in dce_v6_0_early_init()
2735 adev->mode_info.num_dig = 2; in dce_v6_0_early_init()
2751 for (i = 0; i < adev->mode_info.num_crtc; i++) { in dce_v6_0_sw_init()
2768 adev->mode_info.mode_config_initialized = true; in dce_v6_0_sw_init()
2786 for (i = 0; i < adev->mode_info.num_crtc; i++) { in dce_v6_0_sw_init()
2810 r = drm_vblank_init(adev_to_drm(adev), adev->mode_info.num_crtc); in dce_v6_0_sw_init()
2827 drm_edid_free(adev->mode_info.bios_hardcoded_edid); in dce_v6_0_sw_fini()
2835 adev->mode_info.mode_config_initialized = false; in dce_v6_0_sw_fini()
2854 for (i = 0; i < adev->mode_info.audio.num_pins; i++) { in dce_v6_0_hw_init()
2855 dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); in dce_v6_0_hw_init()
2870 for (i = 0; i < adev->mode_info.audio.num_pins; i++) { in dce_v6_0_hw_fini()
2871 dce_v6_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); in dce_v6_0_hw_fini()
2889 adev->mode_info.bl_level = in dce_v6_0_suspend()
2901 adev->mode_info.bl_level); in dce_v6_0_resume()
2906 if (adev->mode_info.bl_encoder) { in dce_v6_0_resume()
2908 adev->mode_info.bl_encoder); in dce_v6_0_resume()
2909 amdgpu_display_backlight_set_level(adev, adev->mode_info.bl_encoder, in dce_v6_0_resume()
2956 if (crtc >= adev->mode_info.num_crtc) { in dce_v6_0_set_crtc_vblank_interrupt_state()
3015 if (hpd >= adev->mode_info.num_hpd) { in dce_v6_0_set_hpd_irq_state()
3130 if (type >= adev->mode_info.num_crtc) { in dce_v6_0_set_pageflip_irq_state()
3156 amdgpu_crtc = adev->mode_info.crtcs[crtc_id]; in dce_v6_0_pageflip_irq()
3158 if (crtc_id >= adev->mode_info.num_crtc) { in dce_v6_0_pageflip_irq()
3206 if (entry->src_data[0] >= adev->mode_info.num_hpd) { in dce_v6_0_hpd_irq()
3286 dig->afmt = adev->mode_info.afmt[dig->dig_encoder]; in dce_v6_0_encoder_prepare()
3440 switch (adev->mode_info.num_crtc) { in dce_v6_0_encoder_add()
3534 adev->mode_info.funcs = &dce_v6_0_display_funcs; in dce_v6_0_set_display_funcs()
3554 if (adev->mode_info.num_crtc > 0) in dce_v6_0_set_irq_funcs()
3555 adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + adev->mode_info.num_crtc; in dce_v6_0_set_irq_funcs()
3560 adev->pageflip_irq.num_types = adev->mode_info.num_crtc; in dce_v6_0_set_irq_funcs()
3563 adev->hpd_irq.num_types = adev->mode_info.num_hpd; in dce_v6_0_set_irq_funcs()