Lines Matching refs:fb_format
1803 uint32_t fb_format, fb_pitch_pixels; in dce_v8_0_crtc_do_set_base() local
1847 fb_format = ((GRPH_DEPTH_8BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1852 fb_format = ((GRPH_DEPTH_16BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1860 fb_format = ((GRPH_DEPTH_16BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1868 fb_format = ((GRPH_DEPTH_16BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1875 fb_format = ((GRPH_DEPTH_16BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1883 fb_format = ((GRPH_DEPTH_32BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1891 fb_format = ((GRPH_DEPTH_32BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1901 fb_format = ((GRPH_DEPTH_32BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1911 fb_format = ((GRPH_DEPTH_32BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base()
1934 fb_format |= (num_banks << GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT); in dce_v8_0_crtc_do_set_base()
1935 fb_format |= (GRPH_ARRAY_2D_TILED_THIN1 << GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT); in dce_v8_0_crtc_do_set_base()
1936 fb_format |= (tile_split << GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT); in dce_v8_0_crtc_do_set_base()
1937 fb_format |= (bankw << GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT); in dce_v8_0_crtc_do_set_base()
1938 fb_format |= (bankh << GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT); in dce_v8_0_crtc_do_set_base()
1939 fb_format |= (mtaspect << GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT); in dce_v8_0_crtc_do_set_base()
1940 fb_format |= (DISPLAY_MICRO_TILING << GRPH_CONTROL__GRPH_MICRO_TILE_MODE__SHIFT); in dce_v8_0_crtc_do_set_base()
1942 fb_format |= (GRPH_ARRAY_1D_TILED_THIN1 << GRPH_CONTROL__GRPH_ARRAY_MODE__SHIFT); in dce_v8_0_crtc_do_set_base()
1945 fb_format |= (pipe_config << GRPH_CONTROL__GRPH_PIPE_CONFIG__SHIFT); in dce_v8_0_crtc_do_set_base()
1962 WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format); in dce_v8_0_crtc_do_set_base()
2621 uint32_t fb_format; in dce_v8_0_panic_flush() local
2631 fb_format = RREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset); in dce_v8_0_panic_flush()
2632 fb_format &= ~GRPH_CONTROL__GRPH_ARRAY_MODE_MASK; in dce_v8_0_panic_flush()
2633 WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format); in dce_v8_0_panic_flush()