Lines Matching refs:wave
817 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t wave, uint32_t address) in wave_read_ind() argument
820 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind()
825 static void wave_read_regs(struct amdgpu_device *adev, uint32_t wave, in wave_read_regs() argument
830 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs()
840 uint32_t simd, uint32_t wave, in gfx_v12_0_read_wave_data() argument
850 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v12_0_read_wave_data()
851 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v12_0_read_wave_data()
852 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v12_0_read_wave_data()
853 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v12_0_read_wave_data()
854 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v12_0_read_wave_data()
855 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID1); in gfx_v12_0_read_wave_data()
856 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_HW_ID2); in gfx_v12_0_read_wave_data()
857 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_GPR_ALLOC); in gfx_v12_0_read_wave_data()
858 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v12_0_read_wave_data()
859 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS); in gfx_v12_0_read_wave_data()
860 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_STS2); in gfx_v12_0_read_wave_data()
861 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1); in gfx_v12_0_read_wave_data()
862 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_M0); in gfx_v12_0_read_wave_data()
863 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_MODE); in gfx_v12_0_read_wave_data()
864 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATE_PRIV); in gfx_v12_0_read_wave_data()
865 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXCP_FLAG_PRIV); in gfx_v12_0_read_wave_data()
866 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXCP_FLAG_USER); in gfx_v12_0_read_wave_data()
867 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_TRAP_CTRL); in gfx_v12_0_read_wave_data()
868 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_ACTIVE); in gfx_v12_0_read_wave_data()
869 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_VALID_AND_IDLE); in gfx_v12_0_read_wave_data()
870 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_DVGPR_ALLOC_LO); in gfx_v12_0_read_wave_data()
871 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_DVGPR_ALLOC_HI); in gfx_v12_0_read_wave_data()
872 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_SCHED_MODE); in gfx_v12_0_read_wave_data()
877 uint32_t wave, uint32_t start, in gfx_v12_0_read_wave_sgprs() argument
883 adev, wave, 0, start + SQIND_WAVE_SGPRS_OFFSET, size, in gfx_v12_0_read_wave_sgprs()
889 uint32_t wave, uint32_t thread, in gfx_v12_0_read_wave_vgprs() argument
894 adev, wave, thread, in gfx_v12_0_read_wave_vgprs()