Lines Matching refs:NUM_BANKS
1131 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1135 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1139 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1143 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1147 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1151 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1155 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1159 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1163 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1167 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1171 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1175 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1179 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1183 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1314 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1318 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1322 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1326 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1330 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1334 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1338 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1342 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1346 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1350 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1354 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1358 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1362 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1366 NUM_BANKS(ADDR_SURF_4_BANK)); in gfx_v7_0_tiling_mode_table_init()
1484 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1488 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1492 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1496 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1500 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1504 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1508 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()
1512 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1516 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1520 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1524 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1528 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1532 NUM_BANKS(ADDR_SURF_16_BANK)); in gfx_v7_0_tiling_mode_table_init()
1536 NUM_BANKS(ADDR_SURF_8_BANK)); in gfx_v7_0_tiling_mode_table_init()