Lines Matching refs:PACKET3
2045 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); in gfx_v7_0_ring_test_ring()
2088 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v7_0_ring_emit_hdp_flush()
2101 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); in gfx_v7_0_ring_emit_vgt_flush()
2105 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0)); in gfx_v7_0_ring_emit_vgt_flush()
2131 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); in gfx_v7_0_ring_emit_fence_gfx()
2143 amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4)); in gfx_v7_0_ring_emit_fence_gfx()
2175 amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5)); in gfx_v7_0_ring_emit_fence_compute()
2214 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v7_0_ring_emit_ib_gfx()
2219 header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); in gfx_v7_0_ring_emit_ib_gfx()
2221 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); in gfx_v7_0_ring_emit_ib_gfx()
2254 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); in gfx_v7_0_ring_emit_ib_compute()
2259 amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); in gfx_v7_0_ring_emit_ib_compute()
2284 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_ring_emit_cntxcntl()
2313 ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1); in gfx_v7_0_ring_test_ib()
2481 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v7_0_cp_gfx_start()
2487 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v7_0_cp_gfx_start()
2490 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v7_0_cp_gfx_start()
2498 PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v7_0_cp_gfx_start()
2506 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start()
2511 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v7_0_cp_gfx_start()
2514 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v7_0_cp_gfx_start()
2517 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_cp_gfx_start()
3112 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v7_0_ring_emit_pipeline_sync()
3124 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v7_0_ring_emit_pipeline_sync()
3126 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v7_0_ring_emit_pipeline_sync()
3155 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v7_0_ring_emit_vm_flush()
3168 amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); in gfx_v7_0_ring_emit_vm_flush()
3172 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v7_0_ring_emit_vm_flush()
3174 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v7_0_ring_emit_vm_flush()
3184 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_wreg()
3898 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2)); in gfx_v7_0_get_csb_buffer()
3969 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
3977 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
3985 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
3993 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v7_0_ring_emit_gds_switch()
4863 amdgpu_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3)); in gfx_v7_0_emit_mem_sync()
4875 amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5)); in gfx_v7_0_emit_mem_sync_compute()
4907 .nop = PACKET3(PACKET3_NOP, 0x3FFF),
4941 .nop = PACKET3(PACKET3_NOP, 0x3FFF),