Lines Matching refs:length_dw
896 ib.length_dw = 5; in gfx_v8_0_ring_test_ib()
1525 ib.length_dw = 0; in gfx_v8_0_do_edc_gpr_workarounds()
1530 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1531 ib.ptr[ib.length_dw++] = vgpr_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1532 ib.ptr[ib.length_dw++] = vgpr_init_regs[i + 1]; in gfx_v8_0_do_edc_gpr_workarounds()
1536 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1537 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1538 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1539 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1542 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v8_0_do_edc_gpr_workarounds()
1543 ib.ptr[ib.length_dw++] = 8; /* x */ in gfx_v8_0_do_edc_gpr_workarounds()
1544 ib.ptr[ib.length_dw++] = 1; /* y */ in gfx_v8_0_do_edc_gpr_workarounds()
1545 ib.ptr[ib.length_dw++] = 1; /* z */ in gfx_v8_0_do_edc_gpr_workarounds()
1546 ib.ptr[ib.length_dw++] = in gfx_v8_0_do_edc_gpr_workarounds()
1550 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1551 ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); in gfx_v8_0_do_edc_gpr_workarounds()
1556 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1557 ib.ptr[ib.length_dw++] = sgpr1_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1558 ib.ptr[ib.length_dw++] = sgpr1_init_regs[i + 1]; in gfx_v8_0_do_edc_gpr_workarounds()
1562 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1563 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1564 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1565 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1568 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v8_0_do_edc_gpr_workarounds()
1569 ib.ptr[ib.length_dw++] = 8; /* x */ in gfx_v8_0_do_edc_gpr_workarounds()
1570 ib.ptr[ib.length_dw++] = 1; /* y */ in gfx_v8_0_do_edc_gpr_workarounds()
1571 ib.ptr[ib.length_dw++] = 1; /* z */ in gfx_v8_0_do_edc_gpr_workarounds()
1572 ib.ptr[ib.length_dw++] = in gfx_v8_0_do_edc_gpr_workarounds()
1576 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1577 ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); in gfx_v8_0_do_edc_gpr_workarounds()
1582 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1583 ib.ptr[ib.length_dw++] = sgpr2_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1584 ib.ptr[ib.length_dw++] = sgpr2_init_regs[i + 1]; in gfx_v8_0_do_edc_gpr_workarounds()
1588 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1589 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1590 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1591 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1594 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v8_0_do_edc_gpr_workarounds()
1595 ib.ptr[ib.length_dw++] = 8; /* x */ in gfx_v8_0_do_edc_gpr_workarounds()
1596 ib.ptr[ib.length_dw++] = 1; /* y */ in gfx_v8_0_do_edc_gpr_workarounds()
1597 ib.ptr[ib.length_dw++] = 1; /* z */ in gfx_v8_0_do_edc_gpr_workarounds()
1598 ib.ptr[ib.length_dw++] = in gfx_v8_0_do_edc_gpr_workarounds()
1602 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v8_0_do_edc_gpr_workarounds()
1603 ib.ptr[ib.length_dw++] = EVENT_TYPE(7) | EVENT_INDEX(4); in gfx_v8_0_do_edc_gpr_workarounds()
6052 control |= ib->length_dw | (vmid << 24); in gfx_v8_0_ring_emit_ib_gfx()
6077 u32 control = INDIRECT_BUFFER_VALID | ib->length_dw | (vmid << 24); in gfx_v8_0_ring_emit_ib_compute()