Lines Matching refs:gds
4590 WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4602 adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4830 (adev->gds.gds_size)) { in gfx_v9_0_ecc_late_init()
5529 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v9_0_ring_emit_ib_compute()
5774 AMDGPU_CSA_SIZE - adev->gds.gds_size, in gfx_v9_0_ring_emit_de_meta()
7678 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
7683 adev->gds.gds_size = 0x1000; in gfx_v9_0_set_gds_init()
7689 adev->gds.gds_size = 0; in gfx_v9_0_set_gds_init()
7692 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
7699 adev->gds.gds_compute_max_wave_id = 0x7ff; in gfx_v9_0_set_gds_init()
7702 adev->gds.gds_compute_max_wave_id = 0x27f; in gfx_v9_0_set_gds_init()
7707 adev->gds.gds_compute_max_wave_id = 0x77; /* raven2 */ in gfx_v9_0_set_gds_init()
7709 adev->gds.gds_compute_max_wave_id = 0x15f; /* raven1 */ in gfx_v9_0_set_gds_init()
7712 adev->gds.gds_compute_max_wave_id = 0xfff; in gfx_v9_0_set_gds_init()
7716 adev->gds.gds_compute_max_wave_id = 0; in gfx_v9_0_set_gds_init()
7720 adev->gds.gds_compute_max_wave_id = 0x7ff; in gfx_v9_0_set_gds_init()
7724 adev->gds.gws_size = 64; in gfx_v9_0_set_gds_init()
7725 adev->gds.oa_size = 16; in gfx_v9_0_set_gds_init()