Lines Matching refs:simd
716 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t … in wave_read_ind() argument
720 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_ind()
726 static void wave_read_regs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in wave_read_regs() argument
732 (simd << SQ_IND_INDEX__SIMD_ID__SHIFT) | in wave_read_regs()
742 uint32_t xcc_id, uint32_t simd, uint32_t wave, in gfx_v9_4_3_read_wave_data() argument
747 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_4_3_read_wave_data()
748 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_LO); in gfx_v9_4_3_read_wave_data()
749 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_PC_HI); in gfx_v9_4_3_read_wave_data()
750 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_LO); in gfx_v9_4_3_read_wave_data()
751 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_EXEC_HI); in gfx_v9_4_3_read_wave_data()
752 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_HW_ID); in gfx_v9_4_3_read_wave_data()
753 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_INST_DW0); in gfx_v9_4_3_read_wave_data()
754 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_INST_DW1); in gfx_v9_4_3_read_wave_data()
755 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_GPR_ALLOC); in gfx_v9_4_3_read_wave_data()
756 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_LDS_ALLOC); in gfx_v9_4_3_read_wave_data()
757 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_TRAPSTS); in gfx_v9_4_3_read_wave_data()
758 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_IB_STS); in gfx_v9_4_3_read_wave_data()
759 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_IB_DBG0); in gfx_v9_4_3_read_wave_data()
760 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_M0); in gfx_v9_4_3_read_wave_data()
761 dst[(*no_fields)++] = wave_read_ind(adev, xcc_id, simd, wave, ixSQ_WAVE_MODE); in gfx_v9_4_3_read_wave_data()
764 static void gfx_v9_4_3_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_4_3_read_wave_sgprs() argument
768 wave_read_regs(adev, xcc_id, simd, wave, 0, in gfx_v9_4_3_read_wave_sgprs()
772 static void gfx_v9_4_3_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_4_3_read_wave_vgprs() argument
777 wave_read_regs(adev, xcc_id, simd, wave, thread, in gfx_v9_4_3_read_wave_vgprs()