Lines Matching refs:GC
39 return (u64)RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_FB_OFFSET) << 24; in gfxhub_v1_2_get_mc_fb_offset()
52 WREG32_SOC15_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_setup_vm_pt_regs()
57 WREG32_SOC15_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_setup_vm_pt_regs()
94 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
97 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
101 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
104 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
108 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
111 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
115 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
118 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_gart_aperture_regs()
135 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_BASE, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
136 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v1_2_xcc_init_system_aperture_regs()
137 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v1_2_xcc_init_system_aperture_regs()
141 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v1_2_xcc_init_system_aperture_regs()
154 WREG32_SOC15_RLC(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_system_aperture_regs()
159 WREG32_SOC15_RLC(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init_system_aperture_regs()
165 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v1_2_xcc_init_system_aperture_regs()
167 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v1_2_xcc_init_system_aperture_regs()
171 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, in gfxhub_v1_2_xcc_init_system_aperture_regs()
173 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, in gfxhub_v1_2_xcc_init_system_aperture_regs()
176 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL2); in gfxhub_v1_2_xcc_init_system_aperture_regs()
179 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL2, tmp); in gfxhub_v1_2_xcc_init_system_aperture_regs()
186 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_TOP, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
187 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_FB_LOCATION_BASE, 0x00FFFFFF); in gfxhub_v1_2_xcc_init_system_aperture_regs()
188 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_TOP, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
189 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_AGP_BOT, 0xFFFFFF); in gfxhub_v1_2_xcc_init_system_aperture_regs()
190 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_LOW_ADDR, 0x3FFFFFFF); in gfxhub_v1_2_xcc_init_system_aperture_regs()
191 WREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_SYSTEM_APERTURE_HIGH_ADDR, 0); in gfxhub_v1_2_xcc_init_system_aperture_regs()
204 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_2_xcc_init_tlb_regs()
218 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_2_xcc_init_tlb_regs()
230 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL); in gfxhub_v1_2_xcc_init_cache_regs()
239 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
241 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL2); in gfxhub_v1_2_xcc_init_cache_regs()
244 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL2, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
256 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL3, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
267 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL4, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
278 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL); in gfxhub_v1_2_xcc_enable_system_domain()
286 WREG32_SOC15(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL, tmp); in gfxhub_v1_2_xcc_enable_system_domain()
297 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
300 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
304 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
307 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
311 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
313 WREG32_SOC15(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_disable_identity_aperture()
346 tmp = RREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
380 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL, in gfxhub_v1_2_xcc_setup_vmid_config()
382 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
385 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
388 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
392 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), in gfxhub_v1_2_xcc_setup_vmid_config()
410 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v1_2_xcc_program_invalidation()
412 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v1_2_xcc_program_invalidation()
456 WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT0_CNTL, in gfxhub_v1_2_xcc_gart_disable()
460 tmp = RREG32_SOC15(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_2_xcc_gart_disable()
466 WREG32_SOC15_RLC(GC, GET_INST(GC, j), regMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_2_xcc_gart_disable()
470 tmp = RREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL); in gfxhub_v1_2_xcc_gart_disable()
472 WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_gart_disable()
473 WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL3, 0); in gfxhub_v1_2_xcc_gart_disable()
494 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v1_2_xcc_set_fault_enable_default()
525 WREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL, tmp); in gfxhub_v1_2_xcc_set_fault_enable_default()
553 SOC15_REG_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init()
556 SOC15_REG_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init()
559 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_SEM); in gfxhub_v1_2_xcc_init()
561 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_REQ); in gfxhub_v1_2_xcc_init()
563 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_INVALIDATE_ENG0_ACK); in gfxhub_v1_2_xcc_init()
565 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_CONTEXT0_CNTL); in gfxhub_v1_2_xcc_init()
567 SOC15_REG_OFFSET(GC, GET_INST(GC, i), in gfxhub_v1_2_xcc_init()
570 SOC15_REG_OFFSET(GC, GET_INST(GC, i), regVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v1_2_xcc_init()
601 xgmi_lfb_cntl = RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_XGMI_LFB_CNTL); in gfxhub_v1_2_get_xgmi_info()
603 RREG32_SOC15(GC, GET_INST(GC, 0), regMC_VM_XGMI_LFB_SIZE), in gfxhub_v1_2_get_xgmi_info()