Lines Matching refs:GC
110 u64 base = RREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE); in gfxhub_v2_1_get_fb_location()
120 return (u64)RREG32_SOC15(GC, 0, mmGCMC_VM_FB_OFFSET) << 24; in gfxhub_v2_1_get_mc_fb_offset()
128 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_1_setup_vm_pt_regs()
132 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_1_setup_vm_pt_regs()
143 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs()
145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs()
148 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs()
150 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs()
162 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_1_init_system_aperture_regs()
163 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_1_init_system_aperture_regs()
164 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_1_init_system_aperture_regs()
167 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_1_init_system_aperture_regs()
169 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_1_init_system_aperture_regs()
174 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v2_1_init_system_aperture_regs()
176 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v2_1_init_system_aperture_regs()
180 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, in gfxhub_v2_1_init_system_aperture_regs()
182 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, in gfxhub_v2_1_init_system_aperture_regs()
185 WREG32_FIELD15(GC, 0, GCVM_L2_PROTECTION_FAULT_CNTL2, in gfxhub_v2_1_init_system_aperture_regs()
195 tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL); in gfxhub_v2_1_init_tlb_regs()
206 WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v2_1_init_tlb_regs()
220 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL); in gfxhub_v2_1_init_cache_regs()
231 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, tmp); in gfxhub_v2_1_init_cache_regs()
233 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2); in gfxhub_v2_1_init_cache_regs()
236 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, tmp); in gfxhub_v2_1_init_cache_regs()
248 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp); in gfxhub_v2_1_init_cache_regs()
253 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL4, tmp); in gfxhub_v2_1_init_cache_regs()
257 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL5, tmp); in gfxhub_v2_1_init_cache_regs()
264 tmp = RREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL); in gfxhub_v2_1_enable_system_domain()
269 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp); in gfxhub_v2_1_enable_system_domain()
280 WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32, in gfxhub_v2_1_disable_identity_aperture()
282 WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32, in gfxhub_v2_1_disable_identity_aperture()
285 WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32, in gfxhub_v2_1_disable_identity_aperture()
287 WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32, in gfxhub_v2_1_disable_identity_aperture()
290 WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32, 0); in gfxhub_v2_1_disable_identity_aperture()
291 WREG32_SOC15(GC, 0, mmGCVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32, 0); in gfxhub_v2_1_disable_identity_aperture()
302 tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i * hub->ctx_distance); in gfxhub_v2_1_setup_vmid_config()
327 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
329 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_setup_vmid_config()
331 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_setup_vmid_config()
333 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_setup_vmid_config()
336 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_setup_vmid_config()
350 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v2_1_program_invalidation()
352 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v2_1_program_invalidation()
365 WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE, in gfxhub_v2_1_gart_enable()
367 WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_TOP, in gfxhub_v2_1_gart_enable()
393 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, in gfxhub_v2_1_gart_disable()
397 tmp = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL); in gfxhub_v2_1_gart_disable()
401 WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v2_1_gart_disable()
407 WREG32_FIELD15(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v2_1_gart_disable()
408 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, 0); in gfxhub_v2_1_gart_disable()
428 tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v2_1_set_fault_enable_default()
458 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, tmp); in gfxhub_v2_1_set_fault_enable_default()
471 SOC15_REG_OFFSET(GC, 0, in gfxhub_v2_1_init()
474 SOC15_REG_OFFSET(GC, 0, in gfxhub_v2_1_init()
477 SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_SEM); in gfxhub_v2_1_init()
479 SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_REQ); in gfxhub_v2_1_init()
481 SOC15_REG_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ACK); in gfxhub_v2_1_init()
483 SOC15_REG_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL); in gfxhub_v2_1_init()
485 SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_STATUS); in gfxhub_v2_1_init()
487 SOC15_REG_OFFSET(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v2_1_init()
522 efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SA_UNIT_DISABLE); in gfxhub_v2_1_utcl2_harvest()
527 vbios_setting = RREG32_SOC15(GC, 0, mmGC_USER_SA_UNIT_DISABLE); in gfxhub_v2_1_utcl2_harvest()
542 WREG32_SOC15(GC, 0, mmGCUTCL2_HARVEST_BYPASS_GROUPS_YELLOW_CARP, disabled_sa); in gfxhub_v2_1_utcl2_harvest()
553 adev->gmc.VM_L2_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL); in gfxhub_v2_1_save_regs()
554 adev->gmc.VM_L2_CNTL2 = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2); in gfxhub_v2_1_save_regs()
555 adev->gmc.VM_DUMMY_PAGE_FAULT_CNTL = RREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_CNTL); in gfxhub_v2_1_save_regs()
556 adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_LO32 = RREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_LO32); in gfxhub_v2_1_save_regs()
557 adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_HI32 = RREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_HI32); in gfxhub_v2_1_save_regs()
558 adev->gmc.VM_L2_PROTECTION_FAULT_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v2_1_save_regs()
559 adev->gmc.VM_L2_PROTECTION_FAULT_CNTL2 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL2); in gfxhub_v2_1_save_regs()
560 …adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL3 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL… in gfxhub_v2_1_save_regs()
561 …adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL4 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL… in gfxhub_v2_1_save_regs()
562 …adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_LO32 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_L… in gfxhub_v2_1_save_regs()
563 …adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_HI32 = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_H… in gfxhub_v2_1_save_regs()
564 adev->gmc.VM_DEBUG = RREG32_SOC15(GC, 0, mmGCVM_DEBUG); in gfxhub_v2_1_save_regs()
565 adev->gmc.VM_L2_MM_GROUP_RT_CLASSES = RREG32_SOC15(GC, 0, mmGCVM_L2_MM_GROUP_RT_CLASSES); in gfxhub_v2_1_save_regs()
566 adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID = RREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID); in gfxhub_v2_1_save_regs()
567 …adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID2 = RREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID… in gfxhub_v2_1_save_regs()
568 adev->gmc.VM_L2_CACHE_PARITY_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_CACHE_PARITY_CNTL); in gfxhub_v2_1_save_regs()
569 adev->gmc.VM_L2_IH_LOG_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_IH_LOG_CNTL); in gfxhub_v2_1_save_regs()
572 adev->gmc.VM_CONTEXT_CNTL[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, i); in gfxhub_v2_1_save_regs()
573 …adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAG… in gfxhub_v2_1_save_regs()
574 …adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAG… in gfxhub_v2_1_save_regs()
575 …adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PA… in gfxhub_v2_1_save_regs()
576 …adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PA… in gfxhub_v2_1_save_regs()
577 …adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE… in gfxhub_v2_1_save_regs()
578 …adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE… in gfxhub_v2_1_save_regs()
581 adev->gmc.MC_VM_MX_L1_TLB_CNTL = RREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL); in gfxhub_v2_1_save_regs()
588 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, adev->gmc.VM_L2_CNTL); in gfxhub_v2_1_restore_regs()
589 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL2, adev->gmc.VM_L2_CNTL2); in gfxhub_v2_1_restore_regs()
590 WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_CNTL, adev->gmc.VM_DUMMY_PAGE_FAULT_CNTL); in gfxhub_v2_1_restore_regs()
591 WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_LO32, adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_LO32); in gfxhub_v2_1_restore_regs()
592 WREG32_SOC15(GC, 0, mmGCVM_DUMMY_PAGE_FAULT_ADDR_HI32, adev->gmc.VM_DUMMY_PAGE_FAULT_ADDR_HI32); in gfxhub_v2_1_restore_regs()
593 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL); in gfxhub_v2_1_restore_regs()
594 WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL2, adev->gmc.VM_L2_PROTECTION_FAULT_CNTL2); in gfxhub_v2_1_restore_regs()
595 …WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL3, adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL3… in gfxhub_v2_1_restore_regs()
596 …WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_MM_CNTL4, adev->gmc.VM_L2_PROTECTION_FAULT_MM_CNTL4… in gfxhub_v2_1_restore_regs()
597 …WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_LO32, adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_LO… in gfxhub_v2_1_restore_regs()
598 …WREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_ADDR_HI32, adev->gmc.VM_L2_PROTECTION_FAULT_ADDR_HI… in gfxhub_v2_1_restore_regs()
599 WREG32_SOC15(GC, 0, mmGCVM_DEBUG, adev->gmc.VM_DEBUG); in gfxhub_v2_1_restore_regs()
600 WREG32_SOC15(GC, 0, mmGCVM_L2_MM_GROUP_RT_CLASSES, adev->gmc.VM_L2_MM_GROUP_RT_CLASSES); in gfxhub_v2_1_restore_regs()
601 WREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID, adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID); in gfxhub_v2_1_restore_regs()
602 …WREG32_SOC15(GC, 0, mmGCVM_L2_BANK_SELECT_RESERVED_CID2, adev->gmc.VM_L2_BANK_SELECT_RESERVED_CID2… in gfxhub_v2_1_restore_regs()
603 WREG32_SOC15(GC, 0, mmGCVM_L2_CACHE_PARITY_CNTL, adev->gmc.VM_L2_CACHE_PARITY_CNTL); in gfxhub_v2_1_restore_regs()
604 WREG32_SOC15(GC, 0, mmGCVM_L2_IH_LOG_CNTL, adev->gmc.VM_L2_IH_LOG_CNTL); in gfxhub_v2_1_restore_regs()
607 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, i, adev->gmc.VM_CONTEXT_CNTL[i]); in gfxhub_v2_1_restore_regs()
608 …WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, i * 2, adev->gmc.VM_CONTEXT_… in gfxhub_v2_1_restore_regs()
609 …WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, i * 2, adev->gmc.VM_CONTEXT_… in gfxhub_v2_1_restore_regs()
610 …WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, i * 2, adev->gmc.VM_CONTEXT… in gfxhub_v2_1_restore_regs()
611 …WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, i * 2, adev->gmc.VM_CONTEXT… in gfxhub_v2_1_restore_regs()
612 …WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, i * 2, adev->gmc.VM_CONTEXT_P… in gfxhub_v2_1_restore_regs()
613 …WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, i * 2, adev->gmc.VM_CONTEXT_P… in gfxhub_v2_1_restore_regs()
616 WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_BASE, adev->gmc.vram_start >> 24); in gfxhub_v2_1_restore_regs()
617 WREG32_SOC15(GC, 0, mmGCMC_VM_FB_LOCATION_TOP, adev->gmc.vram_end >> 24); in gfxhub_v2_1_restore_regs()
618 WREG32_SOC15(GC, 0, mmGCMC_VM_MX_L1_TLB_CNTL, adev->gmc.MC_VM_MX_L1_TLB_CNTL); in gfxhub_v2_1_restore_regs()
631 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_halt()
633 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_halt()
635 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_halt()
638 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_halt()
642 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfxhub_v2_1_halt()
648 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfxhub_v2_1_halt()