Lines Matching refs:gmc
166 adev->gmc.vm_fault.num_types = 1; in gmc_v11_0_set_irq_funcs()
167 adev->gmc.vm_fault.funcs = &gmc_v11_0_irq_funcs; in gmc_v11_0_set_irq_funcs()
170 adev->gmc.ecc_irq.num_types = 1; in gmc_v11_0_set_irq_funcs()
171 adev->gmc.ecc_irq.funcs = &gmc_v11_0_ecc_funcs; in gmc_v11_0_set_irq_funcs()
244 spin_lock(&adev->gmc.invalidate_lock); in gmc_v11_0_flush_gpu_tlb()
295 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v11_0_flush_gpu_tlb()
458 if (!adev->gmc.translate_further) in gmc_v11_0_get_vm_pde()
538 adev->gmc.gmc_funcs = &gmc_v11_0_gmc_funcs; in gmc_v11_0_set_gmc_funcs()
612 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v11_0_early_init()
613 adev->gmc.shared_aperture_end = in gmc_v11_0_early_init()
614 adev->gmc.shared_aperture_start + (4ULL << 30) - 1; in gmc_v11_0_early_init()
615 adev->gmc.private_aperture_start = 0x1000000000000000ULL; in gmc_v11_0_early_init()
616 adev->gmc.private_aperture_end = in gmc_v11_0_early_init()
617 adev->gmc.private_aperture_start + (4ULL << 30) - 1; in gmc_v11_0_early_init()
618 adev->gmc.noretry_flags = AMDGPU_VM_NORETRY_FLAGS_TF; in gmc_v11_0_early_init()
636 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v11_0_late_init()
647 amdgpu_gmc_vram_location(adev, &adev->gmc, base); in gmc_v11_0_vram_gtt_location()
675 adev->gmc.mc_vram_size = in gmc_v11_0_mc_init()
677 adev->gmc.real_vram_size = adev->gmc.mc_vram_size; in gmc_v11_0_mc_init()
684 adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); in gmc_v11_0_mc_init()
685 adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); in gmc_v11_0_mc_init()
689 adev->gmc.aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev); in gmc_v11_0_mc_init()
690 adev->gmc.aper_size = adev->gmc.real_vram_size; in gmc_v11_0_mc_init()
694 adev->gmc.visible_vram_size = adev->gmc.aper_size; in gmc_v11_0_mc_init()
695 if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size) in gmc_v11_0_mc_init()
696 adev->gmc.visible_vram_size = adev->gmc.real_vram_size; in gmc_v11_0_mc_init()
700 adev->gmc.gart_size = 512ULL << 20; in gmc_v11_0_mc_init()
702 adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; in gmc_v11_0_mc_init()
704 gmc_v11_0_vram_gtt_location(adev, &adev->gmc); in gmc_v11_0_mc_init()
739 spin_lock_init(&adev->gmc.invalidate_lock); in gmc_v11_0_sw_init()
743 adev->gmc.vram_width = vram_width; in gmc_v11_0_sw_init()
745 adev->gmc.vram_type = vram_type; in gmc_v11_0_sw_init()
746 adev->gmc.vram_vendor = vram_vendor; in gmc_v11_0_sw_init()
754 adev->gmc.mall_size *= 2; in gmc_v11_0_sw_init()
786 &adev->gmc.vm_fault); in gmc_v11_0_sw_init()
793 &adev->gmc.vm_fault); in gmc_v11_0_sw_init()
800 &adev->gmc.ecc_irq); in gmc_v11_0_sw_init()
809 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v11_0_sw_init()
916 (unsigned int)(adev->gmc.gart_size >> 20), in gmc_v11_0_gart_enable()
927 adev->gmc.flush_pasid_uses_kiq = !amdgpu_emu_mode; in gmc_v11_0_hw_init()
964 amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); in gmc_v11_0_hw_fini()
966 if (adev->gmc.ecc_irq.funcs && in gmc_v11_0_hw_fini()
968 amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0); in gmc_v11_0_hw_fini()