Lines Matching refs:gmc
159 adev->gmc.vm_fault.num_types = 1; in gmc_v12_0_set_irq_funcs()
160 adev->gmc.vm_fault.funcs = &gmc_v12_0_irq_funcs; in gmc_v12_0_set_irq_funcs()
163 adev->gmc.ecc_irq.num_types = 1; in gmc_v12_0_set_irq_funcs()
164 adev->gmc.ecc_irq.funcs = &gmc_v12_0_ecc_funcs; in gmc_v12_0_set_irq_funcs()
213 spin_lock(&adev->gmc.invalidate_lock); in gmc_v12_0_flush_vm_hub()
272 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v12_0_flush_vm_hub()
475 adev->gmc.vram_start; in gmc_v12_0_get_vm_pde()
478 if (!adev->gmc.translate_further) in gmc_v12_0_get_vm_pde()
555 adev->gmc.gmc_funcs = &gmc_v12_0_gmc_funcs; in gmc_v12_0_set_gmc_funcs()
608 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v12_0_early_init()
609 adev->gmc.shared_aperture_end = in gmc_v12_0_early_init()
610 adev->gmc.shared_aperture_start + (4ULL << 30) - 1; in gmc_v12_0_early_init()
611 adev->gmc.private_aperture_start = 0x1000000000000000ULL; in gmc_v12_0_early_init()
612 adev->gmc.private_aperture_end = in gmc_v12_0_early_init()
613 adev->gmc.private_aperture_start + (4ULL << 30) - 1; in gmc_v12_0_early_init()
631 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v12_0_late_init()
642 amdgpu_gmc_vram_location(adev, &adev->gmc, base); in gmc_v12_0_vram_gtt_location()
668 adev->gmc.mc_vram_size = in gmc_v12_0_mc_init()
670 adev->gmc.real_vram_size = adev->gmc.mc_vram_size; in gmc_v12_0_mc_init()
678 adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); in gmc_v12_0_mc_init()
679 adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); in gmc_v12_0_mc_init()
683 adev->gmc.aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev); in gmc_v12_0_mc_init()
684 adev->gmc.aper_size = adev->gmc.real_vram_size; in gmc_v12_0_mc_init()
688 adev->gmc.visible_vram_size = adev->gmc.aper_size; in gmc_v12_0_mc_init()
689 if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size) in gmc_v12_0_mc_init()
690 adev->gmc.visible_vram_size = adev->gmc.real_vram_size; in gmc_v12_0_mc_init()
694 adev->gmc.gart_size = 512ULL << 20; in gmc_v12_0_mc_init()
696 adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; in gmc_v12_0_mc_init()
698 gmc_v12_0_vram_gtt_location(adev, &adev->gmc); in gmc_v12_0_mc_init()
734 spin_lock_init(&adev->gmc.invalidate_lock); in gmc_v12_0_sw_init()
738 adev->gmc.vram_width = vram_width; in gmc_v12_0_sw_init()
740 adev->gmc.vram_type = vram_type; in gmc_v12_0_sw_init()
741 adev->gmc.vram_vendor = vram_vendor; in gmc_v12_0_sw_init()
762 &adev->gmc.vm_fault); in gmc_v12_0_sw_init()
769 &adev->gmc.vm_fault); in gmc_v12_0_sw_init()
776 &adev->gmc.ecc_irq); in gmc_v12_0_sw_init()
785 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v12_0_sw_init()
886 (unsigned)(adev->gmc.gart_size >> 20), in gmc_v12_0_gart_enable()
932 amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); in gmc_v12_0_hw_fini()
934 if (adev->gmc.ecc_irq.funcs && in gmc_v12_0_hw_fini()
936 amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0); in gmc_v12_0_hw_fini()