Lines Matching refs:gmc

160 	err = amdgpu_ucode_request(adev, &adev->gmc.fw, AMDGPU_UCODE_REQUIRED,  in gmc_v7_0_init_microcode()
164 amdgpu_ucode_release(&adev->gmc.fw); in gmc_v7_0_init_microcode()
185 if (!adev->gmc.fw) in gmc_v7_0_mc_load_microcode()
188 hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; in gmc_v7_0_mc_load_microcode()
191 adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); in gmc_v7_0_mc_load_microcode()
194 (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); in gmc_v7_0_mc_load_microcode()
197 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v7_0_mc_load_microcode()
294 adev->gmc.vram_start >> 12); in gmc_v7_0_mc_program()
296 adev->gmc.vram_end >> 12); in gmc_v7_0_mc_program()
300 WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22); in gmc_v7_0_mc_program()
301 WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22); in gmc_v7_0_mc_program()
328 adev->gmc.vram_width = amdgpu_atombios_get_vram_width(adev); in gmc_v7_0_mc_init()
329 if (!adev->gmc.vram_width) { in gmc_v7_0_mc_init()
371 adev->gmc.vram_width = numchan * chansize; in gmc_v7_0_mc_init()
374 adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; in gmc_v7_0_mc_init()
375 adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL; in gmc_v7_0_mc_init()
382 adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); in gmc_v7_0_mc_init()
383 adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); in gmc_v7_0_mc_init()
387 adev->gmc.real_vram_size > adev->gmc.aper_size && in gmc_v7_0_mc_init()
389 adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22; in gmc_v7_0_mc_init()
390 adev->gmc.aper_size = adev->gmc.real_vram_size; in gmc_v7_0_mc_init()
394 adev->gmc.visible_vram_size = adev->gmc.aper_size; in gmc_v7_0_mc_init()
401 adev->gmc.gart_size = 256ULL << 20; in gmc_v7_0_mc_init()
409 adev->gmc.gart_size = 1024ULL << 20; in gmc_v7_0_mc_init()
414 adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; in gmc_v7_0_mc_init()
417 adev->gmc.gart_size += adev->pm.smu_prv_buffer_size; in gmc_v7_0_mc_init()
418 gmc_v7_0_vram_gtt_location(adev, &adev->gmc); in gmc_v7_0_mc_init()
551 if (enable && !adev->gmc.prt_warning) { in gmc_v7_0_set_prt()
553 adev->gmc.prt_warning = true; in gmc_v7_0_set_prt()
652 WREG32(mmVM_CONTEXT0_PAGE_TABLE_START_ADDR, adev->gmc.gart_start >> 12); in gmc_v7_0_gart_enable()
653 WREG32(mmVM_CONTEXT0_PAGE_TABLE_END_ADDR, adev->gmc.gart_end >> 12); in gmc_v7_0_gart_enable()
707 (unsigned int)(adev->gmc.gart_size >> 20), in gmc_v7_0_gart_enable()
942 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v7_0_early_init()
943 adev->gmc.shared_aperture_end = in gmc_v7_0_early_init()
944 adev->gmc.shared_aperture_start + (4ULL << 30) - 1; in gmc_v7_0_early_init()
945 adev->gmc.private_aperture_start = in gmc_v7_0_early_init()
946 adev->gmc.shared_aperture_end + 1; in gmc_v7_0_early_init()
947 adev->gmc.private_aperture_end = in gmc_v7_0_early_init()
948 adev->gmc.private_aperture_start + (4ULL << 30) - 1; in gmc_v7_0_early_init()
949 adev->gmc.noretry_flags = AMDGPU_VM_NORETRY_FLAGS_TF; in gmc_v7_0_early_init()
959 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v7_0_late_init()
990 adev->gmc.vram_type = AMDGPU_VRAM_TYPE_UNKNOWN; in gmc_v7_0_sw_init()
995 adev->gmc.vram_type = gmc_v7_0_convert_vram_type(tmp); in gmc_v7_0_sw_init()
998 …_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_PAGE_INV_FAULT, &adev->gmc.vm_fault); in gmc_v7_0_sw_init()
1002 …_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_GFX_MEM_PROT_FAULT, &adev->gmc.vm_fault); in gmc_v7_0_sw_init()
1016 adev->gmc.mc_mask = 0xffffffffffULL; /* 40 bit MC */ in gmc_v7_0_sw_init()
1065 adev->gmc.vm_fault_info = kmalloc(sizeof(struct kfd_vm_fault_info), in gmc_v7_0_sw_init()
1067 if (!adev->gmc.vm_fault_info) in gmc_v7_0_sw_init()
1069 atomic_set(&adev->gmc.vm_fault_info_updated, 0); in gmc_v7_0_sw_init()
1080 kfree(adev->gmc.vm_fault_info); in gmc_v7_0_sw_fini()
1083 amdgpu_ucode_release(&adev->gmc.fw); in gmc_v7_0_sw_fini()
1119 amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); in gmc_v7_0_hw_fini()
1291 && !atomic_read(&adev->gmc.vm_fault_info_updated)) { in gmc_v7_0_process_interrupt()
1292 struct kfd_vm_fault_info *info = adev->gmc.vm_fault_info; in gmc_v7_0_process_interrupt()
1308 atomic_set(&adev->gmc.vm_fault_info_updated, 1); in gmc_v7_0_process_interrupt()
1375 adev->gmc.gmc_funcs = &gmc_v7_0_gmc_funcs; in gmc_v7_0_set_gmc_funcs()
1380 adev->gmc.vm_fault.num_types = 1; in gmc_v7_0_set_irq_funcs()
1381 adev->gmc.vm_fault.funcs = &gmc_v7_0_irq_funcs; in gmc_v7_0_set_irq_funcs()