Lines Matching refs:gmc
753 adev->gmc.vm_fault.num_types = 1; in gmc_v9_0_set_irq_funcs()
754 adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs; in gmc_v9_0_set_irq_funcs()
757 !adev->gmc.xgmi.connected_to_cpu && in gmc_v9_0_set_irq_funcs()
758 !adev->gmc.is_app_apu) { in gmc_v9_0_set_irq_funcs()
759 adev->gmc.ecc_irq.num_types = 1; in gmc_v9_0_set_irq_funcs()
760 adev->gmc.ecc_irq.funcs = &gmc_v9_0_ecc_funcs; in gmc_v9_0_set_irq_funcs()
868 spin_lock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb()
930 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb()
1104 if (!adev->gmc.translate_further) in gmc_v9_0_get_vm_pde()
1157 adev->gmc.xgmi.connected_to_cpu) in gmc_v9_0_get_coherence_flags()
1297 if (adev->gmc.is_app_apu && vm->mem_id >= 0) { in gmc_v9_0_override_vm_pte_flags()
1298 local_node = adev->gmc.mem_partitions[vm->mem_id].numa.node; in gmc_v9_0_override_vm_pte_flags()
1382 adev->gmc.reset_flags |= AMDGPU_GMC_INIT_RESET_NPS; in gmc_v9_0_need_reset_on_init()
1406 adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs; in gmc_v9_0_set_gmc_funcs()
1440 if (!adev->gmc.xgmi.connected_to_cpu) in gmc_v9_0_set_umc_funcs()
1455 if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) in gmc_v9_0_set_umc_funcs()
1524 if (!adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_set_mca_ras_funcs()
1537 if (!adev->gmc.xgmi.connected_to_cpu) in gmc_v9_0_set_xgmi_ras_funcs()
1538 adev->gmc.xgmi.ras = &xgmi_ras; in gmc_v9_0_set_xgmi_ras_funcs()
1547 adev->gmc.supported_nps_modes = 0; in gmc_v9_0_init_nps_details()
1558 adev->gmc.supported_nps_modes |= BIT(i); in gmc_v9_0_init_nps_details()
1568 adev->gmc.supported_nps_modes = in gmc_v9_0_init_nps_details()
1589 adev->gmc.xgmi.supported = true; in gmc_v9_0_early_init()
1592 adev->gmc.xgmi.supported = true; in gmc_v9_0_early_init()
1593 adev->gmc.xgmi.connected_to_cpu = in gmc_v9_0_early_init()
1607 adev->gmc.is_app_apu = (pkg_type == AMDGPU_PKG_TYPE_APU && in gmc_v9_0_early_init()
1621 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v9_0_early_init()
1622 adev->gmc.shared_aperture_end = in gmc_v9_0_early_init()
1623 adev->gmc.shared_aperture_start + (4ULL << 30) - 1; in gmc_v9_0_early_init()
1624 adev->gmc.private_aperture_start = 0x1000000000000000ULL; in gmc_v9_0_early_init()
1625 adev->gmc.private_aperture_end = in gmc_v9_0_early_init()
1626 adev->gmc.private_aperture_start + (4ULL << 30) - 1; in gmc_v9_0_early_init()
1627 adev->gmc.noretry_flags = AMDGPU_VM_NORETRY_FLAGS_TF; in gmc_v9_0_early_init()
1663 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v9_0_late_init()
1674 base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size; in gmc_v9_0_vram_gtt_location()
1688 adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size; in gmc_v9_0_vram_gtt_location()
1705 if (!adev->gmc.is_app_apu) { in gmc_v9_0_mc_init()
1706 adev->gmc.mc_vram_size = in gmc_v9_0_mc_init()
1710 adev->gmc.mc_vram_size = 0; in gmc_v9_0_mc_init()
1712 adev->gmc.real_vram_size = adev->gmc.mc_vram_size; in gmc_v9_0_mc_init()
1715 !adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_mc_init()
1720 adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); in gmc_v9_0_mc_init()
1721 adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); in gmc_v9_0_mc_init()
1738 (adev->gmc.xgmi.supported && in gmc_v9_0_mc_init()
1739 adev->gmc.xgmi.connected_to_cpu)) { in gmc_v9_0_mc_init()
1740 adev->gmc.aper_base = in gmc_v9_0_mc_init()
1742 adev->gmc.xgmi.physical_node_id * in gmc_v9_0_mc_init()
1743 adev->gmc.xgmi.node_segment_size; in gmc_v9_0_mc_init()
1744 adev->gmc.aper_size = adev->gmc.real_vram_size; in gmc_v9_0_mc_init()
1748 adev->gmc.visible_vram_size = adev->gmc.aper_size; in gmc_v9_0_mc_init()
1762 adev->gmc.gart_size = 512ULL << 20; in gmc_v9_0_mc_init()
1767 adev->gmc.gart_size = 1024ULL << 20; in gmc_v9_0_mc_init()
1771 adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; in gmc_v9_0_mc_init()
1774 adev->gmc.gart_size += adev->pm.smu_prv_buffer_size; in gmc_v9_0_mc_init()
1776 gmc_v9_0_vram_gtt_location(adev, &adev->gmc); in gmc_v9_0_mc_init()
1791 adev->gmc.vmid0_page_table_depth = 1; in gmc_v9_0_gart_init()
1792 adev->gmc.vmid0_page_table_block_size = 12; in gmc_v9_0_gart_init()
1794 adev->gmc.vmid0_page_table_depth = 0; in gmc_v9_0_gart_init()
1795 adev->gmc.vmid0_page_table_block_size = 0; in gmc_v9_0_gart_init()
1806 if (!adev->gmc.real_vram_size) { in gmc_v9_0_gart_init()
1835 adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0); in gmc_v9_0_save_registers()
1840 adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM; in gmc_v9_4_3_init_vram_info()
1841 adev->gmc.vram_width = 128 * 64; in gmc_v9_4_3_init_vram_info()
1844 adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM3E; in gmc_v9_4_3_init_vram_info()
1857 spin_lock_init(&adev->gmc.invalidate_lock); in gmc_v9_0_sw_init()
1863 adev->gmc.vram_type = AMDGPU_VRAM_TYPE_DDR4; in gmc_v9_0_sw_init()
1864 adev->gmc.vram_width = 64 * 64; in gmc_v9_0_sw_init()
1866 adev->gmc.vram_type = AMDGPU_VRAM_TYPE_HBM; in gmc_v9_0_sw_init()
1867 adev->gmc.vram_width = 128 * 64; in gmc_v9_0_sw_init()
1877 adev->gmc.vram_width = 2048; in gmc_v9_0_sw_init()
1879 adev->gmc.vram_width = vram_width; in gmc_v9_0_sw_init()
1881 if (!adev->gmc.vram_width) { in gmc_v9_0_sw_init()
1892 adev->gmc.vram_width = numchan * chansize; in gmc_v9_0_sw_init()
1896 adev->gmc.vram_type = vram_type; in gmc_v9_0_sw_init()
1897 adev->gmc.vram_vendor = vram_vendor; in gmc_v9_0_sw_init()
1910 adev->gmc.translate_further = in gmc_v9_0_sw_init()
1930 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1939 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1951 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1959 &adev->gmc.vm_fault); in gmc_v9_0_sw_init()
1965 &adev->gmc.vm_fault); in gmc_v9_0_sw_init()
1971 &adev->gmc.vm_fault); in gmc_v9_0_sw_init()
1977 !adev->gmc.xgmi.connected_to_cpu && in gmc_v9_0_sw_init()
1978 !adev->gmc.is_app_apu) { in gmc_v9_0_sw_init()
1981 &adev->gmc.ecc_irq); in gmc_v9_0_sw_init()
1990 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v9_0_sw_init()
2066 if (!adev->gmc.real_vram_size) { in gmc_v9_0_sw_fini()
2072 amdgpu_bo_free_kernel(&adev->gmc.pdb0_bo, NULL, &adev->gmc.ptr_pdb0); in gmc_v9_0_sw_fini()
2075 adev->gmc.num_mem_partitions = 0; in gmc_v9_0_sw_fini()
2076 kfree(adev->gmc.mem_partitions); in gmc_v9_0_sw_fini()
2119 WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register); in gmc_v9_0_restore_registers()
2120 WARN_ON(adev->gmc.sdpif_register != in gmc_v9_0_restore_registers()
2155 (unsigned int)(adev->gmc.gart_size >> 20)); in gmc_v9_0_gart_enable()
2156 if (adev->gmc.pdb0_bo) in gmc_v9_0_gart_enable()
2158 (unsigned long long)amdgpu_bo_gpu_offset(adev->gmc.pdb0_bo)); in gmc_v9_0_gart_enable()
2171 adev->gmc.flush_pasid_uses_kiq = true; in gmc_v9_0_hw_init()
2178 adev->gmc.flush_tlb_needs_extra_type_2 = in gmc_v9_0_hw_init()
2180 adev->gmc.xgmi.num_physical_nodes; in gmc_v9_0_hw_init()
2268 amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); in gmc_v9_0_hw_fini()
2270 if (adev->gmc.ecc_irq.funcs && in gmc_v9_0_hw_fini()
2272 amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0); in gmc_v9_0_hw_fini()
2291 if (adev->gmc.reset_flags & AMDGPU_GMC_INIT_RESET_NPS) { in gmc_v9_0_resume()
2292 amdgpu_gmc_init_sw_mem_ranges(adev, adev->gmc.mem_partitions); in gmc_v9_0_resume()
2293 adev->gmc.reset_flags &= ~AMDGPU_GMC_INIT_RESET_NPS; in gmc_v9_0_resume()