Lines Matching refs:jpeg
91 adev->jpeg.num_jpeg_inst = 1; in jpeg_v4_0_5_early_init()
94 adev->jpeg.num_jpeg_inst = 2; in jpeg_v4_0_5_early_init()
103 adev->jpeg.num_jpeg_rings = 1; in jpeg_v4_0_5_early_init()
124 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_sw_init()
125 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_sw_init()
130 VCN_4_0__SRCID__JPEG_DECODE, &adev->jpeg.inst[i].irq); in jpeg_v4_0_5_sw_init()
136 VCN_4_0__SRCID_DJPEG0_POISON, &adev->jpeg.inst[i].irq); in jpeg_v4_0_5_sw_init()
142 VCN_4_0__SRCID_EJPEG0_POISON, &adev->jpeg.inst[i].irq); in jpeg_v4_0_5_sw_init()
155 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_sw_init()
156 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_sw_init()
159 ring = adev->jpeg.inst[i].ring_dec; in jpeg_v4_0_5_sw_init()
164 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst[i].irq, in jpeg_v4_0_5_sw_init()
169 adev->jpeg.internal.jpeg_pitch[0] = regUVD_JPEG_PITCH_INTERNAL_OFFSET; in jpeg_v4_0_5_sw_init()
170 adev->jpeg.inst[i].external.jpeg_pitch[0] = SOC15_REG_OFFSET(JPEG, i, regUVD_JPEG_PITCH); in jpeg_v4_0_5_sw_init()
177 adev->jpeg.supported_reset = in jpeg_v4_0_5_sw_init()
178 amdgpu_get_soft_full_reset_mask(&adev->jpeg.inst[0].ring_dec[0]); in jpeg_v4_0_5_sw_init()
180 adev->jpeg.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in jpeg_v4_0_5_sw_init()
227 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_hw_init()
228 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_hw_init()
231 ring = adev->jpeg.inst[i].ring_dec; in jpeg_v4_0_5_hw_init()
252 cancel_delayed_work_sync(&adev->jpeg.idle_work); in jpeg_v4_0_5_hw_fini()
254 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_hw_fini()
255 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_hw_fini()
259 if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && in jpeg_v4_0_5_hw_fini()
423 struct amdgpu_ring *ring = adev->jpeg.inst[inst_idx].ring_dec; in jpeg_v4_0_5_start_dpg_mode()
445 adev->jpeg.inst[inst_idx].dpg_sram_curr_addr = in jpeg_v4_0_5_start_dpg_mode()
446 (uint32_t *)adev->jpeg.inst[inst_idx].dpg_sram_cpu_addr; in jpeg_v4_0_5_start_dpg_mode()
509 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_start()
510 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_start()
513 ring = adev->jpeg.inst[i].ring_dec; in jpeg_v4_0_5_start()
523 jpeg_v4_0_5_start_dpg_mode(adev, i, adev->jpeg.indirect_sram); in jpeg_v4_0_5_start()
575 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_stop()
576 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_stop()
657 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_is_idle()
658 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_is_idle()
673 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_wait_for_idle()
674 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_wait_for_idle()
692 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_set_clockgating_state()
693 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_set_clockgating_state()
716 adev->jpeg.cur_state = AMD_PG_STATE_UNGATE; in jpeg_v4_0_5_set_powergating_state()
720 if (state == adev->jpeg.cur_state) in jpeg_v4_0_5_set_powergating_state()
729 adev->jpeg.cur_state = state; in jpeg_v4_0_5_set_powergating_state()
756 amdgpu_fence_process(adev->jpeg.inst[ip_instance].ring_dec); in jpeg_v4_0_5_process_interrupt()
839 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_set_dec_ring_funcs()
840 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_set_dec_ring_funcs()
843 adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v4_0_5_dec_ring_vm_funcs; in jpeg_v4_0_5_set_dec_ring_funcs()
844 adev->jpeg.inst[i].ring_dec->me = i; in jpeg_v4_0_5_set_dec_ring_funcs()
856 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v4_0_5_set_irq_funcs()
857 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v4_0_5_set_irq_funcs()
860 adev->jpeg.inst[i].irq.num_types = 1; in jpeg_v4_0_5_set_irq_funcs()
861 adev->jpeg.inst[i].irq.funcs = &jpeg_v4_0_5_irq_funcs; in jpeg_v4_0_5_set_irq_funcs()