Lines Matching refs:def
236 uint32_t def, data; in nbio_v7_2_update_medium_grain_clock_gating() local
238 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regCPM_CONTROL)); in nbio_v7_2_update_medium_grain_clock_gating()
255 if (def != data) in nbio_v7_2_update_medium_grain_clock_gating()
262 uint32_t def, data; in nbio_v7_2_update_medium_grain_light_sleep() local
268 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CNTL2)); in nbio_v7_2_update_medium_grain_light_sleep()
274 if (def != data) in nbio_v7_2_update_medium_grain_light_sleep()
277 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, in nbio_v7_2_update_medium_grain_light_sleep()
286 if (def != data) in nbio_v7_2_update_medium_grain_light_sleep()
291 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CNTL2)); in nbio_v7_2_update_medium_grain_light_sleep()
301 if (def != data) in nbio_v7_2_update_medium_grain_light_sleep()
370 uint32_t def, data; in nbio_v7_2_init_registers() local
375 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regBIF1_PCIE_MST_CTRL_3)); in nbio_v7_2_init_registers()
381 if (def != data) in nbio_v7_2_init_registers()
385 def = data = RREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CONFIG_CNTL)); in nbio_v7_2_init_registers()
391 if (def != data) in nbio_v7_2_init_registers()