Lines Matching refs:ib
249 struct amdgpu_ib *ib, in sdma_v2_4_ring_emit_ib() argument
260 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v2_4_ring_emit_ib()
261 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v2_4_ring_emit_ib()
262 amdgpu_ring_write(ring, ib->length_dw); in sdma_v2_4_ring_emit_ib()
587 struct amdgpu_ib ib; in sdma_v2_4_ring_test_ib() local
601 memset(&ib, 0, sizeof(ib)); in sdma_v2_4_ring_test_ib()
603 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v2_4_ring_test_ib()
607 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v2_4_ring_test_ib()
609 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v2_4_ring_test_ib()
610 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v2_4_ring_test_ib()
611 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1); in sdma_v2_4_ring_test_ib()
612 ib.ptr[4] = 0xDEADBEEF; in sdma_v2_4_ring_test_ib()
613 ib.ptr[5] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP); in sdma_v2_4_ring_test_ib()
614 ib.ptr[6] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP); in sdma_v2_4_ring_test_ib()
615 ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP); in sdma_v2_4_ring_test_ib()
616 ib.length_dw = 8; in sdma_v2_4_ring_test_ib()
618 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v2_4_ring_test_ib()
636 amdgpu_ib_free(&ib, NULL); in sdma_v2_4_ring_test_ib()
653 static void sdma_v2_4_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v2_4_vm_copy_pte() argument
659 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v2_4_vm_copy_pte()
661 ib->ptr[ib->length_dw++] = bytes; in sdma_v2_4_vm_copy_pte()
662 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v2_4_vm_copy_pte()
663 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v2_4_vm_copy_pte()
664 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v2_4_vm_copy_pte()
665 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v2_4_vm_copy_pte()
666 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v2_4_vm_copy_pte()
680 static void sdma_v2_4_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v2_4_vm_write_pte() argument
686 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v2_4_vm_write_pte()
688 ib->ptr[ib->length_dw++] = pe; in sdma_v2_4_vm_write_pte()
689 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v2_4_vm_write_pte()
690 ib->ptr[ib->length_dw++] = ndw; in sdma_v2_4_vm_write_pte()
692 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v2_4_vm_write_pte()
693 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v2_4_vm_write_pte()
710 static void sdma_v2_4_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe, in sdma_v2_4_vm_set_pte_pde() argument
715 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE); in sdma_v2_4_vm_set_pte_pde()
716 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v2_4_vm_set_pte_pde()
717 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v2_4_vm_set_pte_pde()
718 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v2_4_vm_set_pte_pde()
719 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v2_4_vm_set_pte_pde()
720 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v2_4_vm_set_pte_pde()
721 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v2_4_vm_set_pte_pde()
722 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v2_4_vm_set_pte_pde()
723 ib->ptr[ib->length_dw++] = 0; in sdma_v2_4_vm_set_pte_pde()
724 ib->ptr[ib->length_dw++] = count; /* number of entries */ in sdma_v2_4_vm_set_pte_pde()
734 static void sdma_v2_4_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v2_4_ring_pad_ib() argument
740 pad_count = (-ib->length_dw) & 7; in sdma_v2_4_ring_pad_ib()
743 ib->ptr[ib->length_dw++] = in sdma_v2_4_ring_pad_ib()
747 ib->ptr[ib->length_dw++] = in sdma_v2_4_ring_pad_ib()
1181 static void sdma_v2_4_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v2_4_emit_copy_buffer() argument
1187 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v2_4_emit_copy_buffer()
1189 ib->ptr[ib->length_dw++] = byte_count; in sdma_v2_4_emit_copy_buffer()
1190 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v2_4_emit_copy_buffer()
1191 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v2_4_emit_copy_buffer()
1192 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v2_4_emit_copy_buffer()
1193 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v2_4_emit_copy_buffer()
1194 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v2_4_emit_copy_buffer()
1207 static void sdma_v2_4_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v2_4_emit_fill_buffer() argument
1212 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL); in sdma_v2_4_emit_fill_buffer()
1213 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v2_4_emit_fill_buffer()
1214 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v2_4_emit_fill_buffer()
1215 ib->ptr[ib->length_dw++] = src_data; in sdma_v2_4_emit_fill_buffer()
1216 ib->ptr[ib->length_dw++] = byte_count; in sdma_v2_4_emit_fill_buffer()