Lines Matching refs:ib
425 struct amdgpu_ib *ib, in sdma_v3_0_ring_emit_ib() argument
436 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v3_0_ring_emit_ib()
437 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v3_0_ring_emit_ib()
438 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib()
861 struct amdgpu_ib ib; in sdma_v3_0_ring_test_ib() local
875 memset(&ib, 0, sizeof(ib)); in sdma_v3_0_ring_test_ib()
877 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v3_0_ring_test_ib()
881 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v3_0_ring_test_ib()
883 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
884 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
885 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1); in sdma_v3_0_ring_test_ib()
886 ib.ptr[4] = 0xDEADBEEF; in sdma_v3_0_ring_test_ib()
887 ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v3_0_ring_test_ib()
888 ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v3_0_ring_test_ib()
889 ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v3_0_ring_test_ib()
890 ib.length_dw = 8; in sdma_v3_0_ring_test_ib()
892 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v3_0_ring_test_ib()
909 amdgpu_ib_free(&ib, NULL); in sdma_v3_0_ring_test_ib()
926 static void sdma_v3_0_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v3_0_vm_copy_pte() argument
932 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v3_0_vm_copy_pte()
934 ib->ptr[ib->length_dw++] = bytes; in sdma_v3_0_vm_copy_pte()
935 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v3_0_vm_copy_pte()
936 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v3_0_vm_copy_pte()
937 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v3_0_vm_copy_pte()
938 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v3_0_vm_copy_pte()
939 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_copy_pte()
953 static void sdma_v3_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v3_0_vm_write_pte() argument
959 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v3_0_vm_write_pte()
961 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v3_0_vm_write_pte()
962 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_write_pte()
963 ib->ptr[ib->length_dw++] = ndw; in sdma_v3_0_vm_write_pte()
965 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v3_0_vm_write_pte()
966 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v3_0_vm_write_pte()
983 static void sdma_v3_0_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe, in sdma_v3_0_vm_set_pte_pde() argument
988 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE); in sdma_v3_0_vm_set_pte_pde()
989 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v3_0_vm_set_pte_pde()
990 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_set_pte_pde()
991 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v3_0_vm_set_pte_pde()
992 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v3_0_vm_set_pte_pde()
993 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v3_0_vm_set_pte_pde()
994 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v3_0_vm_set_pte_pde()
995 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v3_0_vm_set_pte_pde()
996 ib->ptr[ib->length_dw++] = 0; in sdma_v3_0_vm_set_pte_pde()
997 ib->ptr[ib->length_dw++] = count; /* number of entries */ in sdma_v3_0_vm_set_pte_pde()
1007 static void sdma_v3_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v3_0_ring_pad_ib() argument
1013 pad_count = (-ib->length_dw) & 7; in sdma_v3_0_ring_pad_ib()
1016 ib->ptr[ib->length_dw++] = in sdma_v3_0_ring_pad_ib()
1020 ib->ptr[ib->length_dw++] = in sdma_v3_0_ring_pad_ib()
1623 static void sdma_v3_0_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v3_0_emit_copy_buffer() argument
1629 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v3_0_emit_copy_buffer()
1631 ib->ptr[ib->length_dw++] = byte_count; in sdma_v3_0_emit_copy_buffer()
1632 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v3_0_emit_copy_buffer()
1633 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v3_0_emit_copy_buffer()
1634 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v3_0_emit_copy_buffer()
1635 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v3_0_emit_copy_buffer()
1636 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v3_0_emit_copy_buffer()
1649 static void sdma_v3_0_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v3_0_emit_fill_buffer() argument
1654 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL); in sdma_v3_0_emit_fill_buffer()
1655 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v3_0_emit_fill_buffer()
1656 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v3_0_emit_fill_buffer()
1657 ib->ptr[ib->length_dw++] = src_data; in sdma_v3_0_emit_fill_buffer()
1658 ib->ptr[ib->length_dw++] = byte_count; in sdma_v3_0_emit_fill_buffer()