Lines Matching refs:sdma

602 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v4_0_setup_ulv()
627 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
786 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_0_ring_insert_nop() local
790 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_0_ring_insert_nop()
927 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_enable()
961 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_page_stop()
1010 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()
1028 adev->sdma.instance[i].fw_version >= 14) in sdma_v4_0_ctx_switch_enable()
1052 if (adev->sdma.has_page_queue) in sdma_v4_0_enable()
1056 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_enable()
1091 struct amdgpu_ring *ring = &adev->sdma.instance[i].ring; in sdma_v4_0_gfx_resume()
1176 struct amdgpu_ring *ring = &adev->sdma.instance[i].page; in sdma_v4_0_page_resume()
1349 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_load_microcode()
1350 if (!adev->sdma.instance[i].fw) in sdma_v4_0_load_microcode()
1353 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v4_0_load_microcode()
1358 (adev->sdma.instance[i].fw->data + in sdma_v4_0_load_microcode()
1368 adev->sdma.instance[i].fw_version); in sdma_v4_0_load_microcode()
1405 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1410 if (adev->sdma.has_page_queue) in sdma_v4_0_start()
1435 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1436 ring = &adev->sdma.instance[i].ring; in sdma_v4_0_start()
1442 if (adev->sdma.has_page_queue) { in sdma_v4_0_start()
1443 struct amdgpu_ring *page = &adev->sdma.instance[i].page; in sdma_v4_0_start()
1670 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_0_ring_pad_ib() local
1676 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_0_ring_pad_ib()
1739 uint fw_version = adev->sdma.instance[0].fw_version; in sdma_v4_0_fw_support_paging_queue()
1766 adev->sdma.has_page_queue = false; in sdma_v4_0_early_init()
1768 adev->sdma.has_page_queue = true; in sdma_v4_0_early_init()
1804 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1807 &adev->sdma.trap_irq); in sdma_v4_0_sw_init()
1813 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1816 &adev->sdma.ecc_irq); in sdma_v4_0_sw_init()
1822 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1825 &adev->sdma.vm_hole_irq); in sdma_v4_0_sw_init()
1831 &adev->sdma.doorbell_invalid_irq); in sdma_v4_0_sw_init()
1837 &adev->sdma.pool_timeout_irq); in sdma_v4_0_sw_init()
1843 &adev->sdma.srbm_write_irq); in sdma_v4_0_sw_init()
1848 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
1849 ring = &adev->sdma.instance[i].ring; in sdma_v4_0_sw_init()
1871 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v4_0_sw_init()
1877 if (adev->sdma.has_page_queue) { in sdma_v4_0_sw_init()
1878 ring = &adev->sdma.instance[i].page; in sdma_v4_0_sw_init()
1909 &adev->sdma.trap_irq, in sdma_v4_0_sw_init()
1923 ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); in sdma_v4_0_sw_init()
1925 adev->sdma.ip_dump = ptr; in sdma_v4_0_sw_init()
1937 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_fini()
1938 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v4_0_sw_fini()
1939 if (adev->sdma.has_page_queue) in sdma_v4_0_sw_fini()
1940 amdgpu_ring_fini(&adev->sdma.instance[i].page); in sdma_v4_0_sw_fini()
1949 kfree(adev->sdma.ip_dump); in sdma_v4_0_sw_fini()
1976 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_hw_fini()
1977 amdgpu_irq_put(adev, &adev->sdma.ecc_irq, in sdma_v4_0_hw_fini()
2023 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_is_idle()
2036 u32 sdma[AMDGPU_MAX_SDMA_INSTANCES]; in sdma_v4_0_wait_for_idle() local
2040 for (j = 0; j < adev->sdma.num_instances; j++) { in sdma_v4_0_wait_for_idle()
2041 sdma[j] = RREG32_SDMA(j, mmSDMA0_STATUS_REG); in sdma_v4_0_wait_for_idle()
2042 if (!(sdma[j] & SDMA0_STATUS_REG__IDLE_MASK)) in sdma_v4_0_wait_for_idle()
2045 if (j == adev->sdma.num_instances) in sdma_v4_0_wait_for_idle()
2087 amdgpu_fence_process(&adev->sdma.instance[instance].ring); in sdma_v4_0_process_trap_irq()
2092 amdgpu_fence_process(&adev->sdma.instance[instance].page); in sdma_v4_0_process_trap_irq()
2100 amdgpu_fence_process(&adev->sdma.instance[instance].page); in sdma_v4_0_process_trap_irq()
2143 drm_sched_fault(&adev->sdma.instance[instance].ring.sched); in sdma_v4_0_process_illegal_inst_irq()
2172 if (instance < 0 || instance >= adev->sdma.num_instances) { in sdma_v4_0_print_iv_entry()
2243 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_clock_gating()
2257 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_clock_gating()
2282 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_light_sleep()
2290 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_update_medium_grain_light_sleep()
2360 if (!adev->sdma.ip_dump) in sdma_v4_0_print_ip_state()
2363 drm_printf(p, "num_instances:%d\n", adev->sdma.num_instances); in sdma_v4_0_print_ip_state()
2364 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_print_ip_state()
2370 adev->sdma.ip_dump[instance_offset + j]); in sdma_v4_0_print_ip_state()
2381 if (!adev->sdma.ip_dump) in sdma_v4_0_dump_ip_state()
2384 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_dump_ip_state()
2387 adev->sdma.ip_dump[instance_offset + j] = in sdma_v4_0_dump_ip_state()
2481 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_set_ring_funcs()
2482 adev->sdma.instance[i].ring.funcs = &sdma_v4_0_ring_funcs; in sdma_v4_0_set_ring_funcs()
2483 adev->sdma.instance[i].ring.me = i; in sdma_v4_0_set_ring_funcs()
2484 if (adev->sdma.has_page_queue) { in sdma_v4_0_set_ring_funcs()
2485 adev->sdma.instance[i].page.funcs = in sdma_v4_0_set_ring_funcs()
2487 adev->sdma.instance[i].page.me = i; in sdma_v4_0_set_ring_funcs()
2524 adev->sdma.trap_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2525 adev->sdma.ecc_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2527 switch (adev->sdma.num_instances) { in sdma_v4_0_set_irq_funcs()
2530 adev->sdma.vm_hole_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2531 adev->sdma.doorbell_invalid_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2532 adev->sdma.pool_timeout_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2533 adev->sdma.srbm_write_irq.num_types = adev->sdma.num_instances; in sdma_v4_0_set_irq_funcs()
2538 adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs; in sdma_v4_0_set_irq_funcs()
2539 adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs; in sdma_v4_0_set_irq_funcs()
2540 adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs; in sdma_v4_0_set_irq_funcs()
2541 adev->sdma.vm_hole_irq.funcs = &sdma_v4_0_vm_hole_irq_funcs; in sdma_v4_0_set_irq_funcs()
2542 adev->sdma.doorbell_invalid_irq.funcs = &sdma_v4_0_doorbell_invalid_irq_funcs; in sdma_v4_0_set_irq_funcs()
2543 adev->sdma.pool_timeout_irq.funcs = &sdma_v4_0_pool_timeout_irq_funcs; in sdma_v4_0_set_irq_funcs()
2544 adev->sdma.srbm_write_irq.funcs = &sdma_v4_0_srbm_write_irq_funcs; in sdma_v4_0_set_irq_funcs()
2612 if (adev->sdma.has_page_queue) in sdma_v4_0_set_buffer_funcs()
2613 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].page; in sdma_v4_0_set_buffer_funcs()
2615 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v4_0_set_buffer_funcs()
2632 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_set_vm_pte_funcs()
2633 if (adev->sdma.has_page_queue) in sdma_v4_0_set_vm_pte_funcs()
2634 sched = &adev->sdma.instance[i].page.sched; in sdma_v4_0_set_vm_pte_funcs()
2636 sched = &adev->sdma.instance[i].ring.sched; in sdma_v4_0_set_vm_pte_funcs()
2639 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v4_0_set_vm_pte_funcs()
2692 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_query_ras_error_count()
2706 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v4_0_reset_ras_error_count()
2728 adev->sdma.ras = &sdma_v4_0_ras; in sdma_v4_0_set_ras_funcs()
2731 adev->sdma.ras = &sdma_v4_4_ras; in sdma_v4_0_set_ras_funcs()