Lines Matching refs:sdma
168 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_inst_init_golden_registers()
197 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_init_microcode()
353 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_4_2_ring_insert_nop() local
357 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_4_2_ring_insert_nop()
434 << (ring->me % adev->sdma.num_inst_per_aid); in sdma_v4_4_2_ring_emit_hdp_flush()
494 struct amdgpu_ring *sdma[AMDGPU_MAX_SDMA_INSTANCES]; in sdma_v4_4_2_inst_gfx_stop() local
500 sdma[i] = &adev->sdma.instance[i].ring; in sdma_v4_4_2_inst_gfx_stop()
512 if (sdma[i]->use_doorbell) { in sdma_v4_4_2_inst_gfx_stop()
639 if (adev->sdma.has_page_queue) in sdma_v4_4_2_inst_enable()
688 struct amdgpu_ring *ring = &adev->sdma.instance[i].ring; in sdma_v4_4_2_gfx_resume()
723 if (adev->sdma.instance[i].gfx_guilty) in sdma_v4_4_2_gfx_resume()
794 struct amdgpu_ring *ring = &adev->sdma.instance[i].page; in sdma_v4_4_2_page_resume()
811 if (adev->sdma.instance[i].page_guilty) in sdma_v4_4_2_page_resume()
932 if (!adev->sdma.instance[i].fw) in sdma_v4_4_2_inst_load_microcode()
935 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v4_4_2_inst_load_microcode()
940 (adev->sdma.instance[i].fw->data + in sdma_v4_4_2_inst_load_microcode()
950 adev->sdma.instance[i].fw_version); in sdma_v4_4_2_inst_load_microcode()
979 adev->sdma.instance[0].fw) { in sdma_v4_4_2_inst_start()
998 if (adev->sdma.has_page_queue) in sdma_v4_4_2_inst_start()
1032 ring = &adev->sdma.instance[i].ring; in sdma_v4_4_2_inst_start()
1038 if (adev->sdma.has_page_queue) { in sdma_v4_4_2_inst_start()
1039 struct amdgpu_ring *page = &adev->sdma.instance[i].page; in sdma_v4_4_2_inst_start()
1266 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v4_4_2_ring_pad_ib() local
1272 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v4_4_2_ring_pad_ib()
1361 adev->sdma.has_page_queue = true; in sdma_v4_4_2_early_init()
1407 for (i = 0; i < adev->sdma.num_inst_per_aid; i++) { in sdma_v4_4_2_sw_init()
1410 &adev->sdma.trap_irq); in sdma_v4_4_2_sw_init()
1416 for (i = 0; i < adev->sdma.num_inst_per_aid; i++) { in sdma_v4_4_2_sw_init()
1419 &adev->sdma.ecc_irq); in sdma_v4_4_2_sw_init()
1425 for (i = 0; i < adev->sdma.num_inst_per_aid; i++) { in sdma_v4_4_2_sw_init()
1428 &adev->sdma.vm_hole_irq); in sdma_v4_4_2_sw_init()
1434 &adev->sdma.doorbell_invalid_irq); in sdma_v4_4_2_sw_init()
1440 &adev->sdma.pool_timeout_irq); in sdma_v4_4_2_sw_init()
1446 &adev->sdma.srbm_write_irq); in sdma_v4_4_2_sw_init()
1452 &adev->sdma.ctxt_empty_irq); in sdma_v4_4_2_sw_init()
1457 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_sw_init()
1458 mutex_init(&adev->sdma.instance[i].engine_reset_mutex); in sdma_v4_4_2_sw_init()
1460 adev->sdma.instance[i].gfx_guilty = false; in sdma_v4_4_2_sw_init()
1461 adev->sdma.instance[i].page_guilty = false; in sdma_v4_4_2_sw_init()
1462 adev->sdma.instance[i].funcs = &sdma_v4_4_2_sdma_funcs; in sdma_v4_4_2_sw_init()
1464 ring = &adev->sdma.instance[i].ring; in sdma_v4_4_2_sw_init()
1467 aid_id = adev->sdma.instance[i].aid_id; in sdma_v4_4_2_sw_init()
1477 i % adev->sdma.num_inst_per_aid); in sdma_v4_4_2_sw_init()
1478 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v4_4_2_sw_init()
1484 if (adev->sdma.has_page_queue) { in sdma_v4_4_2_sw_init()
1485 ring = &adev->sdma.instance[i].page; in sdma_v4_4_2_sw_init()
1497 i % adev->sdma.num_inst_per_aid); in sdma_v4_4_2_sw_init()
1499 &adev->sdma.trap_irq, in sdma_v4_4_2_sw_init()
1507 adev->sdma.supported_reset = in sdma_v4_4_2_sw_init()
1508 amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring); in sdma_v4_4_2_sw_init()
1516 ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); in sdma_v4_4_2_sw_init()
1518 adev->sdma.ip_dump = ptr; in sdma_v4_4_2_sw_init()
1534 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_sw_fini()
1535 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v4_4_2_sw_fini()
1536 if (adev->sdma.has_page_queue) in sdma_v4_4_2_sw_fini()
1537 amdgpu_ring_fini(&adev->sdma.instance[i].page); in sdma_v4_4_2_sw_fini()
1548 kfree(adev->sdma.ip_dump); in sdma_v4_4_2_sw_fini()
1559 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v4_4_2_hw_init()
1577 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v4_4_2_hw_fini()
1579 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_hw_fini()
1580 amdgpu_irq_put(adev, &adev->sdma.ecc_irq, in sdma_v4_4_2_hw_fini()
1614 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_is_idle()
1627 u32 sdma[AMDGPU_MAX_SDMA_INSTANCES]; in sdma_v4_4_2_wait_for_idle() local
1631 for (j = 0; j < adev->sdma.num_instances; j++) { in sdma_v4_4_2_wait_for_idle()
1632 sdma[j] = RREG32_SDMA(j, regSDMA_STATUS_REG); in sdma_v4_4_2_wait_for_idle()
1633 if (!(sdma[j] & SDMA_STATUS_REG__IDLE_MASK)) in sdma_v4_4_2_wait_for_idle()
1636 if (j == adev->sdma.num_instances) in sdma_v4_4_2_wait_for_idle()
1684 adev->sdma.instance[instance_id].gfx_guilty = in sdma_v4_4_2_stop_queue()
1686 if (adev->sdma.has_page_queue) in sdma_v4_4_2_stop_queue()
1687 adev->sdma.instance[instance_id].page_guilty = in sdma_v4_4_2_stop_queue()
1696 if (adev->sdma.has_page_queue) { in sdma_v4_4_2_stop_queue()
1697 struct amdgpu_ring *page_ring = &adev->sdma.instance[instance_id].page; in sdma_v4_4_2_stop_queue()
1705 if (adev->sdma.has_page_queue) in sdma_v4_4_2_stop_queue()
1773 for (i = instance; i < adev->sdma.num_instances; in sdma_v4_4_2_process_trap_irq()
1774 i += adev->sdma.num_inst_per_aid) { in sdma_v4_4_2_process_trap_irq()
1775 if (adev->sdma.instance[i].aid_id == in sdma_v4_4_2_process_trap_irq()
1780 if (i >= adev->sdma.num_instances) { in sdma_v4_4_2_process_trap_irq()
1789 amdgpu_fence_process(&adev->sdma.instance[i].ring); in sdma_v4_4_2_process_trap_irq()
1792 amdgpu_fence_process(&adev->sdma.instance[i].page); in sdma_v4_4_2_process_trap_irq()
1839 drm_sched_fault(&adev->sdma.instance[instance].ring.sched); in sdma_v4_4_2_process_illegal_inst_irq()
1868 if (instance < 0 || instance >= adev->sdma.num_instances) { in sdma_v4_4_2_print_iv_entry()
2016 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v4_4_2_set_clockgating_state()
2057 if (!adev->sdma.ip_dump) in sdma_v4_4_2_print_ip_state()
2060 drm_printf(p, "num_instances:%d\n", adev->sdma.num_instances); in sdma_v4_4_2_print_ip_state()
2061 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_print_ip_state()
2067 adev->sdma.ip_dump[instance_offset + j]); in sdma_v4_4_2_print_ip_state()
2078 if (!adev->sdma.ip_dump) in sdma_v4_4_2_dump_ip_state()
2081 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_dump_ip_state()
2084 adev->sdma.ip_dump[instance_offset + j] = in sdma_v4_4_2_dump_ip_state()
2178 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_set_ring_funcs()
2179 adev->sdma.instance[i].ring.funcs = &sdma_v4_4_2_ring_funcs; in sdma_v4_4_2_set_ring_funcs()
2180 adev->sdma.instance[i].ring.me = i; in sdma_v4_4_2_set_ring_funcs()
2181 if (adev->sdma.has_page_queue) { in sdma_v4_4_2_set_ring_funcs()
2182 adev->sdma.instance[i].page.funcs = in sdma_v4_4_2_set_ring_funcs()
2184 adev->sdma.instance[i].page.me = i; in sdma_v4_4_2_set_ring_funcs()
2189 adev->sdma.instance[i].aid_id = in sdma_v4_4_2_set_ring_funcs()
2190 dev_inst / adev->sdma.num_inst_per_aid; in sdma_v4_4_2_set_ring_funcs()
2230 adev->sdma.trap_irq.num_types = adev->sdma.num_instances; in sdma_v4_4_2_set_irq_funcs()
2231 adev->sdma.ecc_irq.num_types = adev->sdma.num_instances; in sdma_v4_4_2_set_irq_funcs()
2232 adev->sdma.vm_hole_irq.num_types = adev->sdma.num_instances; in sdma_v4_4_2_set_irq_funcs()
2233 adev->sdma.doorbell_invalid_irq.num_types = adev->sdma.num_instances; in sdma_v4_4_2_set_irq_funcs()
2234 adev->sdma.pool_timeout_irq.num_types = adev->sdma.num_instances; in sdma_v4_4_2_set_irq_funcs()
2235 adev->sdma.srbm_write_irq.num_types = adev->sdma.num_instances; in sdma_v4_4_2_set_irq_funcs()
2236 adev->sdma.ctxt_empty_irq.num_types = adev->sdma.num_instances; in sdma_v4_4_2_set_irq_funcs()
2238 adev->sdma.trap_irq.funcs = &sdma_v4_4_2_trap_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2239 adev->sdma.illegal_inst_irq.funcs = &sdma_v4_4_2_illegal_inst_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2240 adev->sdma.ecc_irq.funcs = &sdma_v4_4_2_ecc_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2241 adev->sdma.vm_hole_irq.funcs = &sdma_v4_4_2_vm_hole_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2242 adev->sdma.doorbell_invalid_irq.funcs = &sdma_v4_4_2_doorbell_invalid_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2243 adev->sdma.pool_timeout_irq.funcs = &sdma_v4_4_2_pool_timeout_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2244 adev->sdma.srbm_write_irq.funcs = &sdma_v4_4_2_srbm_write_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2245 adev->sdma.ctxt_empty_irq.funcs = &sdma_v4_4_2_ctxt_empty_irq_funcs; in sdma_v4_4_2_set_irq_funcs()
2313 if (adev->sdma.has_page_queue) in sdma_v4_4_2_set_buffer_funcs()
2314 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].page; in sdma_v4_4_2_set_buffer_funcs()
2316 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v4_4_2_set_buffer_funcs()
2333 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_set_vm_pte_funcs()
2334 if (adev->sdma.has_page_queue) in sdma_v4_4_2_set_vm_pte_funcs()
2335 sched = &adev->sdma.instance[i].page.sched; in sdma_v4_4_2_set_vm_pte_funcs()
2337 sched = &adev->sdma.instance[i].ring.sched; in sdma_v4_4_2_set_vm_pte_funcs()
2340 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v4_4_2_set_vm_pte_funcs()
2365 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v4_4_2_update_reset_mask()
2369 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v4_4_2_update_reset_mask()
2406 amdgpu_irq_put(adev, &adev->sdma.ecc_irq, in sdma_v4_4_2_xcp_suspend()
2463 .die_id = adev->sdma.instance[sdma_inst].aid_id, in sdma_v4_4_2_inst_query_ras_error_count()
2485 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v4_4_2_query_ras_error_count()
2510 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v4_4_2_reset_ras_error_count()
2608 adev->sdma.ras = &sdma_v4_4_2_ras; in sdma_v4_4_2_set_ras_funcs()