Lines Matching refs:sdma
243 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v6_0_ring_insert_nop() local
247 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v6_0_ring_insert_nop()
399 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_stop()
435 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_ctxempty_int_enable()
465 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_enable()
492 ring = &adev->sdma.instance[i].ring; in sdma_v6_0_gfx_resume_instance()
567 adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances); in sdma_v6_0_gfx_resume_instance()
635 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_resume()
676 if (!adev->sdma.instance[0].fw) in sdma_v6_0_load_microcode()
685 hdr = (const struct sdma_firmware_header_v2_0 *)adev->sdma.instance[0].fw->data; in sdma_v6_0_load_microcode()
690 (adev->sdma.instance[0].fw->data + in sdma_v6_0_load_microcode()
705 (adev->sdma.instance[0].fw->data + in sdma_v6_0_load_microcode()
717 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_load_microcode()
719 hdr = (const struct sdma_firmware_header_v2_0 *)adev->sdma.instance[0].fw->data; in sdma_v6_0_load_microcode()
724 (adev->sdma.instance[0].fw->data + in sdma_v6_0_load_microcode()
735 … WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_ADDR), adev->sdma.instance[0].fw_version); in sdma_v6_0_load_microcode()
741 (adev->sdma.instance[0].fw->data + in sdma_v6_0_load_microcode()
752 … WREG32(sdma_v6_0_get_reg_offset(adev, i, regSDMA0_UCODE_ADDR), adev->sdma.instance[0].fw_version); in sdma_v6_0_load_microcode()
767 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_soft_reset()
802 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_check_soft_reset()
803 ring = &adev->sdma.instance[i].ring; in sdma_v6_0_check_soft_reset()
1144 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v6_0_ring_pad_ib() local
1150 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v6_0_ring_pad_ib()
1264 adev->sdma.ras = &sdma_v6_0_3_ras; in sdma_v6_0_set_ras_funcs()
1280 adev->sdma.no_user_submission = false; in sdma_v6_0_early_init()
1281 adev->sdma.disable_uq = true; in sdma_v6_0_early_init()
1284 adev->sdma.no_user_submission = false; in sdma_v6_0_early_init()
1285 adev->sdma.disable_uq = false; in sdma_v6_0_early_init()
1288 adev->sdma.no_user_submission = true; in sdma_v6_0_early_init()
1289 adev->sdma.disable_uq = false; in sdma_v6_0_early_init()
1318 &adev->sdma.trap_irq); in sdma_v6_0_sw_init()
1325 &adev->sdma.fence_irq); in sdma_v6_0_sw_init()
1329 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_sw_init()
1330 ring = &adev->sdma.instance[i].ring; in sdma_v6_0_sw_init()
1334 ring->no_user_submission = adev->sdma.no_user_submission; in sdma_v6_0_sw_init()
1345 &adev->sdma.trap_irq, in sdma_v6_0_sw_init()
1352 adev->sdma.supported_reset = in sdma_v6_0_sw_init()
1353 amdgpu_get_soft_full_reset_mask(&adev->sdma.instance[0].ring); in sdma_v6_0_sw_init()
1358 if ((adev->sdma.instance[0].fw_version >= 21) && in sdma_v6_0_sw_init()
1360 adev->sdma.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE; in sdma_v6_0_sw_init()
1372 ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); in sdma_v6_0_sw_init()
1374 adev->sdma.ip_dump = ptr; in sdma_v6_0_sw_init()
1380 if ((adev->sdma.instance[0].fw_version >= 24) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1384 if ((adev->sdma.instance[0].fw_version >= 18) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1388 if ((adev->sdma.instance[0].fw_version >= 21) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1392 if ((adev->sdma.instance[0].fw_version >= 25) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1396 if ((adev->sdma.instance[0].fw_version >= 14) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1400 if ((adev->sdma.instance[0].fw_version >= 17) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1404 if ((adev->sdma.instance[0].fw_version >= 15) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1408 if ((adev->sdma.instance[0].fw_version >= 10) && !adev->sdma.disable_uq) in sdma_v6_0_sw_init()
1427 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v6_0_sw_fini()
1428 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v6_0_sw_fini()
1433 kfree(adev->sdma.ip_dump); in sdma_v6_0_sw_fini()
1445 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_set_userq_trap_interrupts()
1448 r = amdgpu_irq_get(adev, &adev->sdma.trap_irq, in sdma_v6_0_set_userq_trap_interrupts()
1451 r = amdgpu_irq_put(adev, &adev->sdma.trap_irq, in sdma_v6_0_set_userq_trap_interrupts()
1502 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_is_idle()
1581 if (ring->me >= adev->sdma.num_instances) { in sdma_v6_0_reset_queue()
1637 amdgpu_fence_process(&adev->sdma.instance[instances].ring); in sdma_v6_0_process_trap_irq()
1700 if (!adev->sdma.ip_dump) in sdma_v6_0_print_ip_state()
1703 drm_printf(p, "num_instances:%d\n", adev->sdma.num_instances); in sdma_v6_0_print_ip_state()
1704 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_print_ip_state()
1710 adev->sdma.ip_dump[instance_offset + j]); in sdma_v6_0_print_ip_state()
1721 if (!adev->sdma.ip_dump) in sdma_v6_0_dump_ip_state()
1725 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_dump_ip_state()
1728 adev->sdma.ip_dump[instance_offset + j] = in sdma_v6_0_dump_ip_state()
1795 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_set_ring_funcs()
1796 adev->sdma.instance[i].ring.funcs = &sdma_v6_0_ring_funcs; in sdma_v6_0_set_ring_funcs()
1797 adev->sdma.instance[i].ring.me = i; in sdma_v6_0_set_ring_funcs()
1816 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 + in sdma_v6_0_set_irq_funcs()
1817 adev->sdma.num_instances; in sdma_v6_0_set_irq_funcs()
1818 adev->sdma.trap_irq.funcs = &sdma_v6_0_trap_irq_funcs; in sdma_v6_0_set_irq_funcs()
1819 adev->sdma.fence_irq.funcs = &sdma_v6_0_fence_irq_funcs; in sdma_v6_0_set_irq_funcs()
1820 adev->sdma.illegal_inst_irq.funcs = &sdma_v6_0_illegal_inst_irq_funcs; in sdma_v6_0_set_irq_funcs()
1888 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v6_0_set_buffer_funcs()
1903 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_set_vm_pte_funcs()
1905 &adev->sdma.instance[i].ring.sched; in sdma_v6_0_set_vm_pte_funcs()
1907 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v6_0_set_vm_pte_funcs()