Lines Matching refs:ib
270 struct amdgpu_ib *ib, in sdma_v7_0_ring_emit_ib() argument
289 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v7_0_ring_emit_ib()
290 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v7_0_ring_emit_ib()
291 amdgpu_ring_write(ring, ib->length_dw); in sdma_v7_0_ring_emit_ib()
1000 struct amdgpu_ib ib; in sdma_v7_0_ring_test_ib() local
1008 memset(&ib, 0, sizeof(ib)); in sdma_v7_0_ring_test_ib()
1019 r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v7_0_ring_test_ib()
1025 ib.ptr[0] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) | in sdma_v7_0_ring_test_ib()
1027 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v7_0_ring_test_ib()
1028 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v7_0_ring_test_ib()
1029 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0); in sdma_v7_0_ring_test_ib()
1030 ib.ptr[4] = 0xDEADBEEF; in sdma_v7_0_ring_test_ib()
1031 ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v7_0_ring_test_ib()
1032 ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v7_0_ring_test_ib()
1033 ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v7_0_ring_test_ib()
1034 ib.length_dw = 8; in sdma_v7_0_ring_test_ib()
1036 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v7_0_ring_test_ib()
1058 amdgpu_ib_free(&ib, NULL); in sdma_v7_0_ring_test_ib()
1076 static void sdma_v7_0_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v7_0_vm_copy_pte() argument
1082 ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COPY) | in sdma_v7_0_vm_copy_pte()
1086 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v7_0_vm_copy_pte()
1087 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v7_0_vm_copy_pte()
1088 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v7_0_vm_copy_pte()
1089 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v7_0_vm_copy_pte()
1090 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v7_0_vm_copy_pte()
1091 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v7_0_vm_copy_pte()
1092 ib->ptr[ib->length_dw++] = 0; in sdma_v7_0_vm_copy_pte()
1107 static void sdma_v7_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v7_0_vm_write_pte() argument
1113 ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_WRITE) | in sdma_v7_0_vm_write_pte()
1115 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v7_0_vm_write_pte()
1116 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v7_0_vm_write_pte()
1117 ib->ptr[ib->length_dw++] = ndw - 1; in sdma_v7_0_vm_write_pte()
1119 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v7_0_vm_write_pte()
1120 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v7_0_vm_write_pte()
1137 static void sdma_v7_0_vm_set_pte_pde(struct amdgpu_ib *ib, in sdma_v7_0_vm_set_pte_pde() argument
1143 ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_PTEPDE); in sdma_v7_0_vm_set_pte_pde()
1144 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v7_0_vm_set_pte_pde()
1145 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v7_0_vm_set_pte_pde()
1146 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v7_0_vm_set_pte_pde()
1147 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v7_0_vm_set_pte_pde()
1148 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v7_0_vm_set_pte_pde()
1149 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v7_0_vm_set_pte_pde()
1150 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v7_0_vm_set_pte_pde()
1151 ib->ptr[ib->length_dw++] = 0; in sdma_v7_0_vm_set_pte_pde()
1152 ib->ptr[ib->length_dw++] = count - 1; /* number of entries */ in sdma_v7_0_vm_set_pte_pde()
1163 static void sdma_v7_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v7_0_ring_pad_ib() argument
1169 pad_count = (-ib->length_dw) & 0x7; in sdma_v7_0_ring_pad_ib()
1172 ib->ptr[ib->length_dw++] = in sdma_v7_0_ring_pad_ib()
1176 ib->ptr[ib->length_dw++] = in sdma_v7_0_ring_pad_ib()
1761 static void sdma_v7_0_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v7_0_emit_copy_buffer() argument
1774 ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COPY) | in sdma_v7_0_emit_copy_buffer()
1779 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v7_0_emit_copy_buffer()
1780 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v7_0_emit_copy_buffer()
1781 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v7_0_emit_copy_buffer()
1782 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v7_0_emit_copy_buffer()
1783 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v7_0_emit_copy_buffer()
1784 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v7_0_emit_copy_buffer()
1787 ib->ptr[ib->length_dw++] = SDMA_DCC_DATA_FORMAT(data_format) | SDMA_DCC_NUM_TYPE(num_type) | in sdma_v7_0_emit_copy_buffer()
1792 ib->ptr[ib->length_dw++] = 0; in sdma_v7_0_emit_copy_buffer()
1805 static void sdma_v7_0_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v7_0_emit_fill_buffer() argument
1810 ib->ptr[ib->length_dw++] = SDMA_PKT_CONSTANT_FILL_HEADER_OP(SDMA_OP_CONST_FILL) | in sdma_v7_0_emit_fill_buffer()
1812 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v7_0_emit_fill_buffer()
1813 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v7_0_emit_fill_buffer()
1814 ib->ptr[ib->length_dw++] = src_data; in sdma_v7_0_emit_fill_buffer()
1815 ib->ptr[ib->length_dw++] = byte_count - 1; in sdma_v7_0_emit_fill_buffer()