Lines Matching refs:fw_shared
151 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_fw_shared_init() local
153 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_fw_shared_init()
154 fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE); in vcn_v4_0_fw_shared_init()
155 fw_shared->sq.is_enabled = 1; in vcn_v4_0_fw_shared_init()
157 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG); in vcn_v4_0_fw_shared_init()
158 fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ? in vcn_v4_0_fw_shared_init()
163 fw_shared->present_flag_0 |= AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT; in vcn_v4_0_fw_shared_init()
164 fw_shared->drm_key_wa.method = in vcn_v4_0_fw_shared_init()
288 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_fini() local
293 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_sw_fini()
294 fw_shared->present_flag_0 = 0; in vcn_v4_0_sw_fini()
295 fw_shared->sq.is_enabled = 0; in vcn_v4_0_sw_fini()
505 lower_32_bits(adev->vcn.inst[inst].fw_shared.gpu_addr)); in vcn_v4_0_mc_resume()
507 upper_32_bits(adev->vcn.inst[inst].fw_shared.gpu_addr)); in vcn_v4_0_mc_resume()
607 lower_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
610 upper_32_bits(adev->vcn.inst[inst_idx].fw_shared.gpu_addr), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()
1012 volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_start_dpg_mode() local
1109 fw_shared->sq.queue_mode |= FW_QUEUE_RING_RESET; in vcn_v4_0_start_dpg_mode()
1120 fw_shared->sq.queue_mode &= ~(FW_QUEUE_RING_RESET | FW_QUEUE_DPG_HOLD_OFF); in vcn_v4_0_start_dpg_mode()
1146 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_start() local
1157 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_start()
1299 fw_shared->sq.queue_mode |= FW_QUEUE_RING_RESET; in vcn_v4_0_start()
1310 fw_shared->sq.queue_mode &= ~(FW_QUEUE_RING_RESET | FW_QUEUE_DPG_HOLD_OFF); in vcn_v4_0_start()
1363 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_start_sriov() local
1455 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_start_sriov()
1456 rb_setup = &fw_shared->rb_setup; in vcn_v4_0_start_sriov()
1463 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG); in vcn_v4_0_start_sriov()
1479 fw_shared->decouple.is_enabled = 1; in vcn_v4_0_start_sriov()
1480 fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_DECOUPLE_FLAG); in vcn_v4_0_start_sriov()
1489 lower_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v4_0_start_sriov()
1492 upper_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v4_0_start_sriov()
1615 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_stop() local
1622 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_stop()
1623 fw_shared->sq.queue_mode |= FW_QUEUE_DPG_HOLD_OFF; in vcn_v4_0_stop()