Lines Matching refs:node_props
428 return sysfs_show_str_val(buffer, offs, dev->node_props.name); in node_show()
436 dev->node_props.cpu_cores_count); in node_show()
438 dev->gpu ? dev->node_props.simd_count : 0); in node_show()
440 dev->node_props.mem_banks_count); in node_show()
442 dev->node_props.caches_count); in node_show()
444 dev->node_props.io_links_count); in node_show()
446 dev->node_props.p2p_links_count); in node_show()
448 dev->node_props.cpu_core_id_base); in node_show()
450 dev->node_props.simd_id_base); in node_show()
452 dev->node_props.max_waves_per_simd); in node_show()
454 dev->node_props.lds_size_in_kb); in node_show()
456 dev->node_props.gds_size_in_kb); in node_show()
458 dev->node_props.num_gws); in node_show()
460 dev->node_props.wave_front_size); in node_show()
462 dev->gpu ? (dev->node_props.array_count * in node_show()
465 dev->node_props.simd_arrays_per_engine); in node_show()
467 dev->node_props.cu_per_simd_array); in node_show()
469 dev->node_props.simd_per_cu); in node_show()
471 dev->node_props.max_slots_scratch_cu); in node_show()
473 dev->node_props.gfx_target_version); in node_show()
475 dev->node_props.vendor_id); in node_show()
477 dev->node_props.device_id); in node_show()
479 dev->node_props.location_id); in node_show()
481 dev->node_props.domain); in node_show()
483 dev->node_props.drm_render_minor); in node_show()
485 dev->node_props.hive_id); in node_show()
487 dev->node_props.num_sdma_engines); in node_show()
489 dev->node_props.num_sdma_xgmi_engines); in node_show()
491 dev->node_props.num_sdma_queues_per_engine); in node_show()
493 dev->node_props.num_cp_queues); in node_show()
500 dev->node_props.capability |= in node_show()
503 dev->node_props.capability |= in node_show()
510 dev->node_props.capability |= in node_show()
515 dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED; in node_show()
518 dev->node_props.max_engine_clk_fcompute); in node_show()
525 dev->node_props.capability); in node_show()
527 dev->node_props.capability2); in node_show()
529 dev->node_props.debug_prop); in node_show()
926 if (dev->node_props.cpu_cores_count && in kfd_debug_print_topology()
927 dev->node_props.simd_count) { in kfd_debug_print_topology()
929 dev->node_props.device_id, in kfd_debug_print_topology()
930 dev->node_props.vendor_id); in kfd_debug_print_topology()
931 } else if (dev->node_props.cpu_cores_count) in kfd_debug_print_topology()
933 else if (dev->node_props.simd_count) in kfd_debug_print_topology()
935 dev->node_props.device_id, in kfd_debug_print_topology()
936 dev->node_props.vendor_id); in kfd_debug_print_topology()
1154 if (dev->node_props.cpu_cores_count) in kfd_assign_gpu()
1157 if (!dev->gpu && (dev->node_props.simd_count > 0)) { in kfd_assign_gpu()
1337 if (!dev->node_props.hive_id) in kfd_fill_iolink_non_crat_info()
1338 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev); in kfd_fill_iolink_non_crat_info()
1339 peer_dev->node_props.hive_id = dev->node_props.hive_id; in kfd_fill_iolink_non_crat_info()
1386 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1); in kfd_build_p2p_node_entry()
1458 kdev->node_props.p2p_links_count++; in kfd_create_indirect_link_prop()
1475 cpu_dev->node_props.p2p_links_count++; in kfd_create_indirect_link_prop()
1547 peer->node_props.p2p_links_count++; in kfd_add_peer_prop()
1795 gpu_processor_id = dev->node_props.simd_id_base; in kfd_fill_cache_non_crat_info()
1860 dev->node_props.caches_count += num_of_entries; in kfd_fill_cache_non_crat_info()
1981 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED; in kfd_topology_set_dbg_firmware_support()
1986 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 << in kfd_topology_set_capabilities()
1990 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT | in kfd_topology_set_capabilities()
1995 dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID; in kfd_topology_set_capabilities()
2000 dev->node_props.debug_prop |= in kfd_topology_set_capabilities()
2004 dev->node_props.debug_prop |= in kfd_topology_set_capabilities()
2009 dev->node_props.capability |= in kfd_topology_set_capabilities()
2013 dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED; in kfd_topology_set_capabilities()
2016 dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 | in kfd_topology_set_capabilities()
2020 dev->node_props.capability |= in kfd_topology_set_capabilities()
2073 dev->node_props.name[i] = __tolower(asic_name[i]); in kfd_topology_add_device()
2077 dev->node_props.name[i] = '\0'; in kfd_topology_add_device()
2079 dev->node_props.simd_arrays_per_engine = in kfd_topology_add_device()
2082 dev->node_props.gfx_target_version = in kfd_topology_add_device()
2084 dev->node_props.vendor_id = gpu->adev->pdev->vendor; in kfd_topology_add_device()
2085 dev->node_props.device_id = gpu->adev->pdev->device; in kfd_topology_add_device()
2086 dev->node_props.capability |= in kfd_topology_add_device()
2090 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev); in kfd_topology_add_device()
2092 dev->node_props.location_id |= dev->gpu->node_id; in kfd_topology_add_device()
2094 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus); in kfd_topology_add_device()
2095 dev->node_props.max_engine_clk_fcompute = in kfd_topology_add_device()
2097 dev->node_props.max_engine_clk_ccompute = in kfd_topology_add_device()
2101 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index; in kfd_topology_add_device()
2103 dev->node_props.drm_render_minor = in kfd_topology_add_device()
2106 dev->node_props.hive_id = gpu->kfd->hive_id; in kfd_topology_add_device()
2107 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu); in kfd_topology_add_device()
2108 dev->node_props.num_sdma_xgmi_engines = in kfd_topology_add_device()
2110 dev->node_props.num_sdma_queues_per_engine = in kfd_topology_add_device()
2113 dev->node_props.num_gws = (dev->gpu->gws && in kfd_topology_add_device()
2116 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm); in kfd_topology_add_device()
2125 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 << in kfd_topology_add_device()
2136 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 << in kfd_topology_add_device()
2152 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; in kfd_topology_add_device()
2160 dev->node_props.simd_count = in kfd_topology_add_device()
2162 dev->node_props.max_waves_per_simd = 10; in kfd_topology_add_device()
2166 dev->node_props.capability |= in kfd_topology_add_device()
2169 dev->node_props.capability |= in kfd_topology_add_device()
2174 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ? in kfd_topology_add_device()
2178 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; in kfd_topology_add_device()
2182 dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS; in kfd_topology_add_device()
2228 dev->node_props.io_links_count--; in kfd_topology_update_io_links()
2244 dev->node_props.p2p_links_count--; in kfd_topology_update_io_links()