Lines Matching refs:v20
73 if (dml2->v20.dml_core_ctx.project != dml_project_dcn35 && in map_hw_resources()
74 dml2->v20.dml_core_ctx.project != dml_project_dcn36 && in map_hw_resources()
75 dml2->v20.dml_core_ctx.project != dml_project_dcn351) { in map_hw_resources()
85 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id[num_pipes] = dml2->v20.scratch.… in map_hw_resources()
86 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_stream_id_valid[num_pipes] = true; in map_hw_resources()
87 …dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id[num_pipes] = dml2->v20.scratch.d… in map_hw_resources()
88 dml2->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_id_valid[num_pipes] = true; in map_hw_resources()
99 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in pack_and_call_dml_mode_support_ex()
101 s->mode_support_params.mode_lib = &dml2->v20.dml_core_ctx; in pack_and_call_dml_mode_support_ex()
104 s->mode_support_params.in_start_state_idx = dml2->v20.dml_core_ctx.states.num_states - 1; in pack_and_call_dml_mode_support_ex()
160 …struct dml2_calculate_lowest_supported_state_for_temp_read_scratch *s = &dml2->v20.scratch.dml2_ca… in calculate_lowest_supported_state_for_temp_read()
161 struct dml2_wrapper_scratch *s_global = &dml2->v20.scratch; in calculate_lowest_supported_state_for_temp_read()
166 build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy); in calculate_lowest_supported_state_for_temp_read()
191 for (i = 0; i < dml2->v20.dml_core_ctx.states.num_states; i++) { in calculate_lowest_supported_state_for_temp_read()
192 …s->uclk_change_latencies[i] = dml2->v20.dml_core_ctx.states.state_array[i].dram_clock_change_laten… in calculate_lowest_supported_state_for_temp_read()
196 for (j = 0; j < dml2->v20.dml_core_ctx.states.num_states; j++) { in calculate_lowest_supported_state_for_temp_read()
197 …dml2->v20.dml_core_ctx.states.state_array[j].dram_clock_change_latency_us = s_global->dummy_pstate… in calculate_lowest_supported_state_for_temp_read()
205 …dml_result = dml_mode_programming(&dml2->v20.dml_core_ctx, s_global->mode_support_params.out_lowes… in calculate_lowest_supported_state_for_temp_read()
209 dml2_extract_watermark_set(&dml2->v20.g6_temp_read_watermark_set, &dml2->v20.dml_core_ctx); in calculate_lowest_supported_state_for_temp_read()
210 …dml2->v20.g6_temp_read_watermark_set.cstate_pstate.fclk_pstate_change_ns = dml2->v20.g6_temp_read_… in calculate_lowest_supported_state_for_temp_read()
214 …while (dml2->v20.dml_core_ctx.states.state_array[result].dram_speed_mts < s_global->dummy_pstate_t… in calculate_lowest_supported_state_for_temp_read()
221 for (i = 0; i < dml2->v20.dml_core_ctx.states.num_states; i++) { in calculate_lowest_supported_state_for_temp_read()
222 …dml2->v20.dml_core_ctx.states.state_array[i].dram_clock_change_latency_us = s->uclk_change_latenci… in calculate_lowest_supported_state_for_temp_read()
269 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in dml_mode_support_wrapper()
273 build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy); in dml_mode_support_wrapper()
311 s->cur_policy = dml2->v20.dml_core_ctx.policy; in dml_mode_support_wrapper()
312 s->optimize_configuration_params.dml_core_ctx = &dml2->v20.dml_core_ctx; in dml_mode_support_wrapper()
314 s->optimize_configuration_params.ip_params = &dml2->v20.dml_core_ctx.ip; in dml_mode_support_wrapper()
322 dml2->v20.dml_core_ctx.policy = s->new_policy; in dml_mode_support_wrapper()
337 dml2->v20.dml_core_ctx.policy = s->cur_policy; in dml_mode_support_wrapper()
367 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in call_dml_mode_support_and_programming()
390 result = dml_mode_programming(&dml2->v20.dml_core_ctx, min_state, &s->cur_display_config, true); in call_dml_mode_support_and_programming()
392 …result = dml_mode_programming(&dml2->v20.dml_core_ctx, s->mode_support_params.out_lowest_state_idx… in call_dml_mode_support_and_programming()
402 struct dml2_wrapper_scratch *s = &dml2->v20.scratch; in dml2_validate_and_build_resource()
413 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
414 …out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabr… in dml2_validate_and_build_resource()
415 …out_clks.uclk_mts = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dram… in dml2_validate_and_build_resource()
416 …out_clks.phyclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].ph… in dml2_validate_and_build_resource()
417 …out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].so… in dml2_validate_and_build_resource()
418 …out_clks.ref_dtbclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx… in dml2_validate_and_build_resource()
425 memset(&dml2->v20.scratch, 0, sizeof(struct dml2_wrapper_scratch)); in dml2_validate_and_build_resource()
426 memset(&dml2->v20.dml_core_ctx.policy, 0, sizeof(struct dml_mode_eval_policy_st)); in dml2_validate_and_build_resource()
427 memset(&dml2->v20.dml_core_ctx.ms, 0, sizeof(struct mode_support_st)); in dml2_validate_and_build_resource()
428 memset(&dml2->v20.dml_core_ctx.mp, 0, sizeof(struct mode_program_st)); in dml2_validate_and_build_resource()
463 out_clks.dispclk_khz = (unsigned int)dml2->v20.dml_core_ctx.mp.Dispclk_calculated * 1000; in dml2_validate_and_build_resource()
466 (lowest_state_idx < dml2->v20.dml_core_ctx.states.num_states - 1)) { in dml2_validate_and_build_resource()
467 lowest_state_idx = dml2->v20.dml_core_ctx.states.num_states - 1; in dml2_validate_and_build_resource()
468 …out_clks.dispclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].d… in dml2_validate_and_build_resource()
471 …out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dc… in dml2_validate_and_build_resource()
472 …out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabr… in dml2_validate_and_build_resource()
473 …out_clks.uclk_mts = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dram… in dml2_validate_and_build_resource()
474 …out_clks.phyclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].ph… in dml2_validate_and_build_resource()
475 …out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].so… in dml2_validate_and_build_resource()
476 …out_clks.ref_dtbclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx… in dml2_validate_and_build_resource()
485 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.a, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
486 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.b, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
488 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.c, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
490 …memcpy(&context->bw_ctx.bw.dcn.watermarks.c, &dml2->v20.g6_temp_read_watermark_set, sizeof(context… in dml2_validate_and_build_resource()
491 dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.d, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
492 dml2_extract_writeback_wm(context, &dml2->v20.dml_core_ctx); in dml2_validate_and_build_resource()
494 context->bw_ctx.dml.vba.StutterPeriod = context->bw_ctx.dml2->v20.dml_core_ctx.mp.StutterPeriod; in dml2_validate_and_build_resource()
519 memset(&dml2->v20.scratch, 0, sizeof(struct dml2_wrapper_scratch)); in dml2_validate_only()
520 memset(&dml2->v20.dml_core_ctx.policy, 0, sizeof(struct dml_mode_eval_policy_st)); in dml2_validate_only()
521 memset(&dml2->v20.dml_core_ctx.ms, 0, sizeof(struct mode_support_st)); in dml2_validate_only()
522 memset(&dml2->v20.dml_core_ctx.mp, 0, sizeof(struct mode_program_st)); in dml2_validate_only()
524 build_unoptimized_policy_settings(dml2->v20.dml_core_ctx.project, &dml2->v20.dml_core_ctx.policy); in dml2_validate_only()
526 map_dc_state_into_dml_display_cfg(dml2, context, &dml2->v20.scratch.cur_display_config); in dml2_validate_only()
528 dml2_apply_det_buffer_allocation_policy(dml2, &dml2->v20.scratch.cur_display_config); in dml2_validate_only()
531 &dml2->v20.scratch.cur_display_config, in dml2_validate_only()
532 &dml2->v20.scratch.mode_support_info, in dml2_validate_only()
536 …ult = does_configuration_meet_sw_policies(dml2, &dml2->v20.scratch.cur_display_config, &dml2->v20.… in dml2_validate_only()
593 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn35; in dml2_init()
596 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn351; in dml2_init()
599 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn36; in dml2_init()
602 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn32; in dml2_init()
605 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn321; in dml2_init()
608 (*dml2)->v20.dml_core_ctx.project = dml_project_dcn401; in dml2_init()
611 (*dml2)->v20.dml_core_ctx.project = dml_project_default; in dml2_init()
617 initialize_dml2_ip_params(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.ip); in dml2_init()
619 initialize_dml2_soc_bbox(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc); in dml2_init()
621 …initialize_dml2_soc_states(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc, &(*dml2)->v20.dml_core_ct… in dml2_init()
656 *fclk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.FCLKChangeSupport[0]; in dml2_extract_dram_and_fclk_change_support()
657 …*dram_clk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.DRAMClockChangeSupport… in dml2_extract_dram_and_fclk_change_support()