Lines Matching refs:AST_IO_VGACRI
165 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4)); in ast_set_vbios_color_reg()
167 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); in ast_set_vbios_color_reg()
170 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); in ast_set_vbios_color_reg()
171 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8); in ast_set_vbios_color_reg()
184 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff); in ast_set_vbios_mode_reg()
185 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff); in ast_set_vbios_mode_reg()
187 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00); in ast_set_vbios_mode_reg()
190 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8); in ast_set_vbios_mode_reg()
191 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000); in ast_set_vbios_mode_reg()
192 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay); in ast_set_vbios_mode_reg()
193 ast_set_index_reg(ast, AST_IO_VGACRI, 0x95, adjusted_mode->crtc_hdisplay >> 8); in ast_set_vbios_mode_reg()
194 ast_set_index_reg(ast, AST_IO_VGACRI, 0x96, adjusted_mode->crtc_vdisplay); in ast_set_vbios_mode_reg()
195 ast_set_index_reg(ast, AST_IO_VGACRI, 0x97, adjusted_mode->crtc_vdisplay >> 8); in ast_set_vbios_mode_reg()
218 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); in ast_set_std_reg()
220 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); in ast_set_std_reg()
222 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); in ast_set_std_reg()
224 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]); in ast_set_std_reg()
255 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00); in ast_set_crtc_reg()
260 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x00, 0x00, temp); in ast_set_crtc_reg()
265 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x01, 0x00, temp); in ast_set_crtc_reg()
270 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x02, 0x00, temp); in ast_set_crtc_reg()
277 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x03, 0xE0, (temp & 0x1f)); in ast_set_crtc_reg()
282 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x04, 0x00, temp); in ast_set_crtc_reg()
287 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05)); in ast_set_crtc_reg()
289 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAC, 0x00, jregAC); in ast_set_crtc_reg()
290 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAD, 0x00, jregAD); in ast_set_crtc_reg()
294 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x02); in ast_set_crtc_reg()
296 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x00); in ast_set_crtc_reg()
306 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x06, 0x00, temp); in ast_set_crtc_reg()
315 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x10, 0x00, temp); in ast_set_crtc_reg()
322 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x70, temp & 0xf); in ast_set_crtc_reg()
331 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x12, 0x00, temp); in ast_set_crtc_reg()
340 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x15, 0x00, temp); in ast_set_crtc_reg()
345 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x16, 0x00, temp); in ast_set_crtc_reg()
347 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x07, 0x00, jreg07); in ast_set_crtc_reg()
348 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x09, 0xdf, jreg09); in ast_set_crtc_reg()
349 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAE, 0x00, (jregAE | 0x80)); in ast_set_crtc_reg()
352 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x80); in ast_set_crtc_reg()
354 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x00); in ast_set_crtc_reg()
356 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x80); in ast_set_crtc_reg()
365 ast_set_index_reg(ast, AST_IO_VGACRI, 0x13, (offset & 0xff)); in ast_set_offset_reg()
366 ast_set_index_reg(ast, AST_IO_VGACRI, 0xb0, (offset >> 8) & 0x3f); in ast_set_offset_reg()
380 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc0, 0x00, clk_info->param1); in ast_set_dclk_reg()
381 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc1, 0x00, clk_info->param2); in ast_set_dclk_reg()
382 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f, in ast_set_dclk_reg()
411 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa0, 0x8f, jregA0); in ast_set_color_reg()
412 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xf0, jregA3); in ast_set_color_reg()
413 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa8, 0xfd, jregA8); in ast_set_color_reg()
420 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0xe0); in ast_set_crtthd_reg()
421 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0xa0); in ast_set_crtthd_reg()
423 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x78); in ast_set_crtthd_reg()
424 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x60); in ast_set_crtthd_reg()
426 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x3f); in ast_set_crtthd_reg()
427 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x2f); in ast_set_crtthd_reg()
429 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x2f); in ast_set_crtthd_reg()
430 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x1f); in ast_set_crtthd_reg()
455 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0d, (u8)(addr & 0xff)); in ast_set_start_address_crt1()
456 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0c, (u8)((addr >> 8) & 0xff)); in ast_set_start_address_crt1()
457 ast_set_index_reg(ast, AST_IO_VGACRI, 0xaf, (u8)((addr >> 16) & 0xff)); in ast_set_start_address_crt1()
705 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06); in ast_crtc_helper_mode_set_nofb()
840 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00); in ast_crtc_helper_atomic_enable()
854 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6); in ast_crtc_helper_atomic_disable()