Lines Matching refs:clock
214 struct gma_clock_t *clock, bool is_lvds, u32 ddi_select) in cdv_dpll_set_clock_cdv() argument
272 m |= ((clock->m2) << SB_M_DIVIDER_SHIFT); in cdv_dpll_set_clock_cdv()
288 n_vco |= ((clock->n) << SB_N_DIVIDER_SHIFT); in cdv_dpll_set_clock_cdv()
290 if (clock->vco < 2250000) { in cdv_dpll_set_clock_cdv()
293 } else if (clock->vco < 2750000) { in cdv_dpll_set_clock_cdv()
296 } else if (clock->vco < 3300000) { in cdv_dpll_set_clock_cdv()
312 p |= SET_FIELD(clock->p1, SB_P1_DIVIDER); in cdv_dpll_set_clock_cdv()
313 switch (clock->p2) { in cdv_dpll_set_clock_cdv()
327 DRM_ERROR("Bad P2 clock: %d\n", clock->p2); in cdv_dpll_set_clock_cdv()
393 static void cdv_intel_clock(int refclk, struct gma_clock_t *clock) in cdv_intel_clock() argument
395 clock->m = clock->m2 + 2; in cdv_intel_clock()
396 clock->p = clock->p1 * clock->p2; in cdv_intel_clock()
397 clock->vco = (refclk * clock->m) / clock->n; in cdv_intel_clock()
398 clock->dot = clock->vco / clock->p; in cdv_intel_clock()
407 struct gma_clock_t clock; in cdv_intel_find_dp_pll() local
409 memset(&clock, 0, sizeof(clock)); in cdv_intel_find_dp_pll()
414 clock.p1 = 2; in cdv_intel_find_dp_pll()
415 clock.p2 = 10; in cdv_intel_find_dp_pll()
416 clock.n = 1; in cdv_intel_find_dp_pll()
417 clock.m1 = 0; in cdv_intel_find_dp_pll()
418 clock.m2 = 118; in cdv_intel_find_dp_pll()
420 clock.p1 = 1; in cdv_intel_find_dp_pll()
421 clock.p2 = 10; in cdv_intel_find_dp_pll()
422 clock.n = 1; in cdv_intel_find_dp_pll()
423 clock.m1 = 0; in cdv_intel_find_dp_pll()
424 clock.m2 = 98; in cdv_intel_find_dp_pll()
430 clock.p1 = 2; in cdv_intel_find_dp_pll()
431 clock.p2 = 10; in cdv_intel_find_dp_pll()
432 clock.n = 5; in cdv_intel_find_dp_pll()
433 clock.m1 = 0; in cdv_intel_find_dp_pll()
434 clock.m2 = 160; in cdv_intel_find_dp_pll()
436 clock.p1 = 1; in cdv_intel_find_dp_pll()
437 clock.p2 = 10; in cdv_intel_find_dp_pll()
438 clock.n = 5; in cdv_intel_find_dp_pll()
439 clock.m1 = 0; in cdv_intel_find_dp_pll()
440 clock.m2 = 133; in cdv_intel_find_dp_pll()
448 gma_crtc->clock_funcs->clock(refclk, &clock); in cdv_intel_find_dp_pll()
449 memcpy(best_clock, &clock, sizeof(struct gma_clock_t)); in cdv_intel_find_dp_pll()
583 struct gma_clock_t clock; in cdv_intel_crtc_mode_set() local
657 ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, in cdv_intel_crtc_mode_set()
658 &clock); in cdv_intel_crtc_mode_set()
661 adjusted_mode->clock, clock.dot); in cdv_intel_crtc_mode_set()
725 cdv_dpll_set_clock_cdv(dev, crtc, &clock, is_lvds, ddi_select); in cdv_intel_crtc_mode_set()
744 if (clock.p2 == 7) in cdv_intel_crtc_mode_set()
779 int sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; in cdv_intel_crtc_mode_set()
826 static void i8xx_clock(int refclk, struct gma_clock_t *clock) in i8xx_clock() argument
828 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); in i8xx_clock()
829 clock->p = clock->p1 * clock->p2; in i8xx_clock()
830 clock->vco = refclk * clock->m / (clock->n + 2); in i8xx_clock()
831 clock->dot = clock->vco / clock->p; in i8xx_clock()
844 struct gma_clock_t clock; in cdv_intel_crtc_clock_get() local
867 clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT; in cdv_intel_crtc_clock_get()
868 clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; in cdv_intel_crtc_clock_get()
869 clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT; in cdv_intel_crtc_clock_get()
872 clock.p1 = in cdv_intel_crtc_clock_get()
876 if (clock.p1 == 0) { in cdv_intel_crtc_clock_get()
877 clock.p1 = 4; in cdv_intel_crtc_clock_get()
880 clock.p2 = 14; in cdv_intel_crtc_clock_get()
885 i8xx_clock(66000, &clock); in cdv_intel_crtc_clock_get()
887 i8xx_clock(48000, &clock); in cdv_intel_crtc_clock_get()
890 clock.p1 = 2; in cdv_intel_crtc_clock_get()
892 clock.p1 = in cdv_intel_crtc_clock_get()
898 clock.p2 = 4; in cdv_intel_crtc_clock_get()
900 clock.p2 = 2; in cdv_intel_crtc_clock_get()
902 i8xx_clock(48000, &clock); in cdv_intel_crtc_clock_get()
910 return clock.dot; in cdv_intel_crtc_clock_get()
945 mode->clock = cdv_intel_crtc_clock_get(dev, crtc); in cdv_intel_crtc_mode_get()
971 .clock = cdv_intel_clock,