Lines Matching refs:DP
256 uint32_t DP; member
1043 intel_dp->DP = DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in cdv_intel_dp_mode_set()
1044 intel_dp->DP |= intel_dp->color_range; in cdv_intel_dp_mode_set()
1047 intel_dp->DP |= DP_SYNC_HS_HIGH; in cdv_intel_dp_mode_set()
1049 intel_dp->DP |= DP_SYNC_VS_HIGH; in cdv_intel_dp_mode_set()
1051 intel_dp->DP |= DP_LINK_TRAIN_OFF; in cdv_intel_dp_mode_set()
1055 intel_dp->DP |= DP_PORT_WIDTH_1; in cdv_intel_dp_mode_set()
1058 intel_dp->DP |= DP_PORT_WIDTH_2; in cdv_intel_dp_mode_set()
1061 intel_dp->DP |= DP_PORT_WIDTH_4; in cdv_intel_dp_mode_set()
1065 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in cdv_intel_dp_mode_set()
1077 intel_dp->DP |= DP_ENHANCED_FRAMING; in cdv_intel_dp_mode_set()
1082 intel_dp->DP |= DP_PIPEB_SELECT; in cdv_intel_dp_mode_set()
1084 REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN)); in cdv_intel_dp_mode_set()
1085 DRM_DEBUG_KMS("DP expected reg is %x\n", intel_dp->DP); in cdv_intel_dp_mode_set()
1472 uint32_t DP = intel_dp->DP; in cdv_intel_dp_start_link_train() local
1474 DP |= DP_PORT_EN; in cdv_intel_dp_start_link_train()
1475 DP &= ~DP_LINK_TRAIN_MASK; in cdv_intel_dp_start_link_train()
1477 reg = DP; in cdv_intel_dp_start_link_train()
1496 reg = DP | DP_LINK_TRAIN_PAT_1; in cdv_intel_dp_start_link_train()
1552 intel_dp->DP = DP; in cdv_intel_dp_start_link_train()
1562 uint32_t DP = intel_dp->DP; in cdv_intel_dp_complete_link_train() local
1569 reg = DP | DP_LINK_TRAIN_PAT_2; in cdv_intel_dp_complete_link_train()
1630 reg = DP | DP_LINK_TRAIN_OFF; in cdv_intel_dp_complete_link_train()
1643 uint32_t DP = intel_dp->DP; in cdv_intel_dp_link_down() local
1652 DP &= ~DP_LINK_TRAIN_MASK; in cdv_intel_dp_link_down()
1653 REG_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); in cdv_intel_dp_link_down()
1659 REG_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in cdv_intel_dp_link_down()