Lines Matching refs:train_set
267 uint8_t train_set[4]; member
1296 intel_dp->train_set[lane] = v | p; in cdv_intel_get_adjust_train()
1385 intel_dp->train_set, in cdv_intel_dplink_set_level()
1390 intel_dp->train_set[0], intel_dp->lane_count); in cdv_intel_dplink_set_level()
1490 memset(intel_dp->train_set, 0, 4); in cdv_intel_dp_start_link_train()
1501 intel_dp->train_set[0], in cdv_intel_dp_start_link_train()
1508 cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); in cdv_intel_dp_start_link_train()
1529 if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) in cdv_intel_dp_start_link_train()
1535 if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) { in cdv_intel_dp_start_link_train()
1541 voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; in cdv_intel_dp_start_link_train()
1549 DRM_DEBUG_KMS("failure in DP pattern 1 training, train set %x\n", intel_dp->train_set[0]); in cdv_intel_dp_start_link_train()
1574 intel_dp->train_set[0], in cdv_intel_dp_complete_link_train()
1591 cdv_intel_dp_set_vswing_premph(encoder, intel_dp->train_set[0]); in cdv_intel_dp_complete_link_train()