Lines Matching refs:phy
58 icl_get_procmon_ref_values(struct intel_display *display, enum phy phy) in icl_get_procmon_ref_values() argument
62 val = intel_de_read(display, ICL_PORT_COMP_DW3(phy)); in icl_get_procmon_ref_values()
81 enum phy phy) in icl_set_procmon_ref_values() argument
85 procmon = icl_get_procmon_ref_values(display, phy); in icl_set_procmon_ref_values()
87 intel_de_rmw(display, ICL_PORT_COMP_DW1(phy), in icl_set_procmon_ref_values()
90 intel_de_write(display, ICL_PORT_COMP_DW9(phy), procmon->dw9); in icl_set_procmon_ref_values()
91 intel_de_write(display, ICL_PORT_COMP_DW10(phy), procmon->dw10); in icl_set_procmon_ref_values()
95 enum phy phy, i915_reg_t reg, u32 mask, in check_phy_reg() argument
104 phy_name(phy), in check_phy_reg()
113 enum phy phy) in icl_verify_procmon_ref_values() argument
118 procmon = icl_get_procmon_ref_values(display, phy); in icl_verify_procmon_ref_values()
120 ret = check_phy_reg(display, phy, ICL_PORT_COMP_DW1(phy), in icl_verify_procmon_ref_values()
122 ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW9(phy), in icl_verify_procmon_ref_values()
124 ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW10(phy), in icl_verify_procmon_ref_values()
130 static bool has_phy_misc(struct intel_display *display, enum phy phy) in has_phy_misc() argument
142 return phy == PHY_A; in has_phy_misc()
146 return phy < PHY_C; in has_phy_misc()
152 enum phy phy) in icl_combo_phy_enabled() argument
155 if (!has_phy_misc(display, phy)) in icl_combo_phy_enabled()
156 return intel_de_read(display, ICL_PORT_COMP_DW0(phy)) & COMP_INIT; in icl_combo_phy_enabled()
158 return !(intel_de_read(display, ICL_PHY_MISC(phy)) & in icl_combo_phy_enabled()
160 (intel_de_read(display, ICL_PORT_COMP_DW0(phy)) & COMP_INIT); in icl_combo_phy_enabled()
190 static bool phy_is_master(struct intel_display *display, enum phy phy) in phy_is_master() argument
208 if (phy == PHY_A) in phy_is_master()
211 return phy == PHY_D; in phy_is_master()
213 return phy == PHY_C; in phy_is_master()
219 enum phy phy) in icl_combo_phy_verify_state() argument
224 if (!icl_combo_phy_enabled(display, phy)) in icl_combo_phy_verify_state()
228 ret &= check_phy_reg(display, phy, ICL_PORT_TX_DW8_LN(0, phy), in icl_combo_phy_verify_state()
234 ret &= check_phy_reg(display, phy, ICL_PORT_PCS_DW1_LN(0, phy), in icl_combo_phy_verify_state()
238 ret &= icl_verify_procmon_ref_values(display, phy); in icl_combo_phy_verify_state()
240 if (phy_is_master(display, phy)) { in icl_combo_phy_verify_state()
241 ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW8(phy), in icl_combo_phy_verify_state()
248 ret &= check_phy_reg(display, phy, ICL_PHY_MISC(phy), in icl_combo_phy_verify_state()
254 ret &= check_phy_reg(display, phy, ICL_PORT_CL_DW5(phy), in icl_combo_phy_verify_state()
261 enum phy phy, bool is_dsi, in intel_combo_phy_power_up_lanes() argument
305 intel_de_rmw(display, ICL_PORT_CL_DW10(phy), in intel_combo_phy_power_up_lanes()
311 enum phy phy; in icl_combo_phys_init() local
313 for_each_combo_phy(display, phy) { in icl_combo_phys_init()
317 if (icl_combo_phy_verify_state(display, phy)) in icl_combo_phys_init()
320 procmon = icl_get_procmon_ref_values(display, phy); in icl_combo_phys_init()
324 phy_name(phy), procmon->name); in icl_combo_phys_init()
326 if (!has_phy_misc(display, phy)) in icl_combo_phys_init()
337 val = intel_de_read(display, ICL_PHY_MISC(phy)); in icl_combo_phys_init()
339 phy == PHY_A) { in icl_combo_phys_init()
347 intel_de_write(display, ICL_PHY_MISC(phy), val); in icl_combo_phys_init()
351 val = intel_de_read(display, ICL_PORT_TX_DW8_LN(0, phy)); in icl_combo_phys_init()
355 intel_de_write(display, ICL_PORT_TX_DW8_GRP(phy), val); in icl_combo_phys_init()
357 val = intel_de_read(display, ICL_PORT_PCS_DW1_LN(0, phy)); in icl_combo_phys_init()
360 intel_de_write(display, ICL_PORT_PCS_DW1_GRP(phy), val); in icl_combo_phys_init()
363 icl_set_procmon_ref_values(display, phy); in icl_combo_phys_init()
365 if (phy_is_master(display, phy)) in icl_combo_phys_init()
366 intel_de_rmw(display, ICL_PORT_COMP_DW8(phy), in icl_combo_phys_init()
369 intel_de_rmw(display, ICL_PORT_COMP_DW0(phy), 0, COMP_INIT); in icl_combo_phys_init()
370 intel_de_rmw(display, ICL_PORT_CL_DW5(phy), in icl_combo_phys_init()
377 enum phy phy; in icl_combo_phys_uninit() local
379 for_each_combo_phy_reverse(display, phy) { in icl_combo_phys_uninit()
380 if (phy == PHY_A && in icl_combo_phys_uninit()
381 !icl_combo_phy_verify_state(display, phy)) { in icl_combo_phys_uninit()
390 phy_name(phy)); in icl_combo_phys_uninit()
394 phy_name(phy)); in icl_combo_phys_uninit()
398 if (!has_phy_misc(display, phy)) in icl_combo_phys_uninit()
401 intel_de_rmw(display, ICL_PHY_MISC(phy), 0, in icl_combo_phys_uninit()
405 intel_de_rmw(display, ICL_PORT_COMP_DW0(phy), COMP_INIT, 0); in icl_combo_phys_uninit()