Lines Matching refs:intel_de_read
387 u32 val = intel_de_read(display, DDI_CLK_SEL(port)) & DDI_CLK_SEL_MASK; in icl_calc_tbt_pll_link()
687 ctl = intel_de_read(display, in intel_ddi_disable_transcoder_func()
768 ddi_mode = intel_de_read(display, TRANS_DDI_FUNC_CTL(display, cpu_transcoder)) & in intel_ddi_connector_get_hw_state()
816 tmp = intel_de_read(display, DDI_BUF_CTL(port)); in intel_ddi_get_encoder_pipes()
821 tmp = intel_de_read(display, in intel_ddi_get_encoder_pipes()
861 tmp = intel_de_read(display, in intel_ddi_get_encoder_pipes()
920 tmp = intel_de_read(display, BXT_PHY_CTL(port)); in intel_ddi_get_encoder_pipes()
1078 tmp = intel_de_read(display, DISPIO_CR_TX_BMU_CR0); in _skl_ddi_set_iboost()
1187 val = intel_de_read(display, ICL_PORT_TX_DW5_LN(0, phy)); in icl_ddi_combo_vswing_program()
1242 val = intel_de_read(display, ICL_PORT_PCS_DW1_LN(0, phy)); in icl_combo_phy_set_signal_levels()
1267 val = intel_de_read(display, ICL_PORT_TX_DW5_LN(0, phy)); in icl_combo_phy_set_signal_levels()
1275 val = intel_de_read(display, ICL_PORT_TX_DW5_LN(0, phy)); in icl_combo_phy_set_signal_levels()
1579 return !(intel_de_read(display, reg) & clk_off); in _icl_ddi_is_clock_enabled()
1588 id = (intel_de_read(display, reg) & clk_sel_mask) >> clk_sel_shift; in _icl_ddi_get_pll()
1731 val = intel_de_read(display, DG1_DPCLKA_CFGCR0(phy)); in dg1_ddi_get_pll()
1826 tmp = intel_de_read(display, DDI_CLK_SEL(port)); in jsl_ddi_tc_is_clock_enabled()
1879 tmp = intel_de_read(display, DDI_CLK_SEL(port)); in icl_ddi_tc_is_clock_enabled()
1884 tmp = intel_de_read(display, ICL_DPCLKA_CFGCR0); in icl_ddi_tc_is_clock_enabled()
1897 tmp = intel_de_read(display, DDI_CLK_SEL(port)); in icl_ddi_tc_get_pll()
1985 return !(intel_de_read(display, DPLL_CTRL2) & DPLL_CTRL2_DDI_CLK_OFF(port)); in skl_ddi_is_clock_enabled()
1995 tmp = intel_de_read(display, DPLL_CTRL2); in skl_ddi_get_pll()
2036 return intel_de_read(display, PORT_CLK_SEL(port)) != PORT_CLK_SEL_NONE; in hsw_ddi_is_clock_enabled()
2046 tmp = intel_de_read(display, PORT_CLK_SEL(port)); in hsw_ddi_get_pll()
2183 ln0 = intel_de_read(display, MG_DP_MODE(0, tc_port)); in icl_program_mg_dp_mode()
2184 ln1 = intel_de_read(display, MG_DP_MODE(1, tc_port)); in icl_program_mg_dp_mode()
2506 dss1 = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe)); in intel_ddi_mso_get_config()
2579 if (wait_for_us(intel_de_read(display, reg) & wait_bits, 100)) { in mtl_ddi_enable_d2d()
3076 if (wait_for_us(!(intel_de_read(display, reg) & wait_bits), 100)) in mtl_ddi_disable_d2d()
3439 val = intel_de_read(display, reg); in intel_ddi_enable_hdmi()
3732 dp_tp_ctl = intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in mtl_ddi_prepare_link_retrain()
3786 dp_tp_ctl = intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_prepare_link_retrain()
3818 temp = intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)); in intel_ddi_set_link_train()
3878 return intel_de_read(display, HSW_AUD_PIN_ELD_CP_VLD) & in intel_ddi_is_audio_enabled()
3926 u32 ctl2 = intel_de_read(display, in bdw_transcoder_master_readout()
3934 u32 ctl = intel_de_read(display, in bdw_transcoder_master_readout()
4024 intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)) & in intel_ddi_read_func_ctl_fdi()
4053 intel_de_read(display, dp_tp_ctl_reg(encoder, crtc_state)) & in intel_ddi_read_func_ctl_dp_sst()
4058 intel_de_read(display, in intel_ddi_read_func_ctl_dp_sst()
4089 intel_de_read(display, in intel_ddi_read_func_ctl_dp_mst()
4103 ddi_func_ctl = intel_de_read(display, TRANS_DDI_FUNC_CTL(display, cpu_transcoder)); in intel_ddi_read_func_ctl()
4815 return intel_de_read(display, SDEISR) & bit; in lpt_digital_port_connected()
4823 return intel_de_read(display, DEISR) & bit; in hsw_digital_port_connected()
4831 return intel_de_read(display, GEN8_DE_PORT_ISR) & bit; in bdw_digital_port_connected()
4888 if (intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) in intel_ddi_max_lanes()
5029 return intel_de_read(display, DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED; in port_strap_detected()
5031 return intel_de_read(display, SFUSE_STRAP) & SFUSE_STRAP_DDIB_DETECTED; in port_strap_detected()
5033 return intel_de_read(display, SFUSE_STRAP) & SFUSE_STRAP_DDIC_DETECTED; in port_strap_detected()
5035 return intel_de_read(display, SFUSE_STRAP) & SFUSE_STRAP_DDID_DETECTED; in port_strap_detected()
5327 ddi_buf_ctl = intel_de_read(display, DDI_BUF_CTL(port)); in intel_ddi_init()