Lines Matching refs:pipe_bpp
2942 if (crtc_state->dither && crtc_state->pipe_bpp != 30) in i9xx_set_pipeconf()
2946 switch (crtc_state->pipe_bpp) { in i9xx_set_pipeconf()
2949 MISSING_CASE(crtc_state->pipe_bpp); in i9xx_set_pipeconf()
3042 pipe_config->pipe_bpp = 18; in i9xx_get_pipe_config()
3045 pipe_config->pipe_bpp = 24; in i9xx_get_pipe_config()
3048 pipe_config->pipe_bpp = 30; in i9xx_get_pipe_config()
3134 switch (crtc_state->pipe_bpp) { in ilk_set_pipeconf()
3137 MISSING_CASE(crtc_state->pipe_bpp); in ilk_set_pipeconf()
3220 switch (crtc_state->pipe_bpp) { in bdw_set_pipe_misc()
3236 MISSING_CASE(crtc_state->pipe_bpp); in bdw_set_pipe_misc()
3379 pipe_config->pipe_bpp = 18; in ilk_get_pipe_config()
3382 pipe_config->pipe_bpp = 24; in ilk_get_pipe_config()
3385 pipe_config->pipe_bpp = 30; in ilk_get_pipe_config()
3388 pipe_config->pipe_bpp = 36; in ilk_get_pipe_config()
4060 else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24) in intel_crtc_dotclock()
4062 pipe_config->pipe_bpp); in intel_crtc_dotclock()
4316 if (bpp < crtc_state->pipe_bpp) { in compute_sink_pipe_bpp()
4323 crtc_state->pipe_bpp); in compute_sink_pipe_bpp()
4325 crtc_state->pipe_bpp = bpp; in compute_sink_pipe_bpp()
4358 crtc_state->pipe_bpp = intel_display_max_pipe_bpp(display); in compute_baseline_pipe_bpp()
4639 if (crtc_state->pipe_bpp > fxp_q4_to_int(crtc_state->max_link_bpp_x16)) { in intel_modeset_pipe_config()
4647 base_bpp = crtc_state->pipe_bpp; in intel_modeset_pipe_config()
4737 crtc_state->dither = (crtc_state->pipe_bpp == 6*3) && in intel_modeset_pipe_config()
4742 base_bpp, crtc_state->pipe_bpp, crtc_state->dither); in intel_modeset_pipe_config()
5353 PIPE_CONF_CHECK_I(pipe_bpp); in intel_pipe_config_compare()