Lines Matching refs:pipe_mode
2186 u32 pixel_rate = crtc_state->hw.pipe_mode.crtc_clock; in ilk_pipe_pixel_rate()
2233 crtc_state->hw.pipe_mode.crtc_clock; in intel_crtc_compute_pixel_rate()
2283 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_readout_derived_state() local
2290 drm_mode_copy(pipe_mode, adjusted_mode); in intel_crtc_readout_derived_state()
2293 intel_splitter_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2300 intel_mode_from_crtc_timings(adjusted_mode, pipe_mode); in intel_crtc_readout_derived_state()
2303 drm_mode_copy(mode, pipe_mode); in intel_crtc_readout_derived_state()
2310 intel_joiner_adjust_timings(crtc_state, pipe_mode); in intel_crtc_readout_derived_state()
2311 intel_mode_from_crtc_timings(pipe_mode, pipe_mode); in intel_crtc_readout_derived_state()
2377 struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in intel_crtc_compute_pipe_mode() local
2384 drm_mode_copy(pipe_mode, adjusted_mode); in intel_crtc_compute_pipe_mode()
2387 intel_splitter_adjust_timings(crtc_state, pipe_mode); in intel_crtc_compute_pipe_mode()
2390 intel_joiner_adjust_timings(crtc_state, pipe_mode); in intel_crtc_compute_pipe_mode()
2391 intel_mode_from_crtc_timings(pipe_mode, pipe_mode); in intel_crtc_compute_pipe_mode()
2401 pipe_mode->crtc_clock > clock_limit) { in intel_crtc_compute_pipe_mode()
2407 if (pipe_mode->crtc_clock > clock_limit) { in intel_crtc_compute_pipe_mode()
2411 pipe_mode->crtc_clock, clock_limit, in intel_crtc_compute_pipe_mode()
4148 const struct drm_display_mode *pipe_mode = in hsw_linetime_wm() local
4149 &crtc_state->hw.pipe_mode; in hsw_linetime_wm()
4155 linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8, in hsw_linetime_wm()
4156 pipe_mode->crtc_clock); in hsw_linetime_wm()
4164 const struct drm_display_mode *pipe_mode = in hsw_ips_linetime_wm() local
4165 &crtc_state->hw.pipe_mode; in hsw_ips_linetime_wm()
4171 linetime_wm = DIV_ROUND_CLOSEST(pipe_mode->crtc_htotal * 1000 * 8, in hsw_ips_linetime_wm()
4180 const struct drm_display_mode *pipe_mode = in skl_linetime_wm() local
4181 &crtc_state->hw.pipe_mode; in skl_linetime_wm()
4187 linetime_wm = DIV_ROUND_UP(pipe_mode->crtc_htotal * 1000 * 8, in skl_linetime_wm()
4537 drm_mode_copy(&secondary_crtc_state->hw.pipe_mode, in copy_joiner_crtc_state_modeset()
4538 &primary_crtc_state->hw.pipe_mode); in copy_joiner_crtc_state_modeset()
5260 PIPE_CONF_CHECK_TIMINGS(hw.pipe_mode); in intel_pipe_config_compare()
5356 PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock); in intel_pipe_config_compare()