Lines Matching refs:dmc_info

83 	} dmc_info[DMC_FW_MAX];  member
403 return dmc && dmc->dmc_info[dmc_id].payload; in has_dmc_id_fw()
578 dmc->dmc_info[dmc_id].mmioaddr[i], in dmc_mmiodata()
579 dmc->dmc_info[dmc_id].mmiodata[i])) in dmc_mmiodata()
582 return dmc->dmc_info[dmc_id].mmiodata[i]; in dmc_mmiodata()
590 for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) { in dmc_load_mmio()
591 intel_de_write(display, dmc->dmc_info[dmc_id].mmioaddr[i], in dmc_load_mmio()
605 for (i = 0; i < dmc->dmc_info[dmc_id].dmc_fw_size; i++) { in dmc_load_program()
607 DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, i), in dmc_load_program()
608 dmc->dmc_info[dmc_id].payload[i]); in dmc_load_program()
626 found = intel_de_read(display, DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, 0)); in assert_dmc_loaded()
627 expected = dmc->dmc_info[dmc_id].payload[0]; in assert_dmc_loaded()
633 for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) { in assert_dmc_loaded()
634 i915_reg_t reg = dmc->dmc_info[dmc_id].mmioaddr[i]; in assert_dmc_loaded()
790 for (i = 0; i < dmc->dmc_info[dmc_id].mmio_count; i++) { in dmc_configure_event()
791 i915_reg_t reg = dmc->dmc_info[dmc_id].mmioaddr[i]; in dmc_configure_event()
792 u32 data = dmc->dmc_info[dmc_id].mmiodata[i]; in dmc_configure_event()
945 if (dmc->dmc_info[dmc_id].present) in dmc_set_fw_offset()
949 dmc->dmc_info[dmc_id].present = true; in dmc_set_fw_offset()
950 dmc->dmc_info[dmc_id].dmc_offset = fw_info[i].offset; in dmc_set_fw_offset()
993 struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id]; in parse_dmc_fw_header() local
999 BUILD_BUG_ON(ARRAY_SIZE(dmc_info->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || in parse_dmc_fw_header()
1000 ARRAY_SIZE(dmc_info->mmioaddr) < DMC_V1_MAX_MMIO_COUNT); in parse_dmc_fw_header()
1065 dmc_info->mmioaddr[i] = _MMIO(mmioaddr[i]); in parse_dmc_fw_header()
1066 dmc_info->mmiodata[i] = mmiodata[i]; in parse_dmc_fw_header()
1070 is_dmc_evt_ctl_reg(display, dmc_id, dmc_info->mmioaddr[i]) ? " (EVT_CTL)" : in parse_dmc_fw_header()
1071 is_dmc_evt_htp_reg(display, dmc_id, dmc_info->mmioaddr[i]) ? " (EVT_HTP)" : "", in parse_dmc_fw_header()
1072 disable_dmc_evt(display, dmc_id, dmc_info->mmioaddr[i], in parse_dmc_fw_header()
1073 dmc_info->mmiodata[i]) ? " (disabling)" : ""); in parse_dmc_fw_header()
1075 dmc_info->mmio_count = mmio_count; in parse_dmc_fw_header()
1076 dmc_info->start_mmioaddr = start_mmioaddr; in parse_dmc_fw_header()
1089 dmc_info->dmc_fw_size = dmc_header->fw_size; in parse_dmc_fw_header()
1091 dmc_info->payload = kmalloc(payload_size, GFP_KERNEL); in parse_dmc_fw_header()
1092 if (!dmc_info->payload) in parse_dmc_fw_header()
1096 memcpy(dmc_info->payload, payload, payload_size); in parse_dmc_fw_header()
1217 if (!dmc->dmc_info[dmc_id].present) in parse_dmc_fw()
1220 offset = readcount + dmc->dmc_info[dmc_id].dmc_offset * 4; in parse_dmc_fw()
1442 kfree(dmc->dmc_info[dmc_id].payload); in intel_dmc_fini()
1590 intel_de_read(display, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0))); in intel_dmc_debugfs_status_show()
1679 return dmc ? dmc->dmc_info[dmc_id].start_mmioaddr : 0; in intel_pipedmc_start_mmioaddr()