Lines Matching refs:mmioaddr
76 i915_reg_t mmioaddr[20]; member
354 u32 mmioaddr[DMC_V1_MAX_MMIO_COUNT]; member
380 u32 mmioaddr[DMC_V3_MAX_MMIO_COUNT]; member
578 dmc->dmc_info[dmc_id].mmioaddr[i], in dmc_mmiodata()
591 intel_de_write(display, dmc->dmc_info[dmc_id].mmioaddr[i], in dmc_load_mmio()
634 i915_reg_t reg = dmc->dmc_info[dmc_id].mmioaddr[i]; in assert_dmc_loaded()
791 i915_reg_t reg = dmc->dmc_info[dmc_id].mmioaddr[i]; in dmc_configure_event()
956 const u32 *mmioaddr, u32 mmio_count, in dmc_mmio_addr_sanity_check() argument
981 if (mmioaddr[i] < start_range || mmioaddr[i] > end_range) in dmc_mmio_addr_sanity_check()
995 const u32 *mmioaddr, *mmiodata; in parse_dmc_fw_header() local
999 BUILD_BUG_ON(ARRAY_SIZE(dmc_info->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || in parse_dmc_fw_header()
1000 ARRAY_SIZE(dmc_info->mmioaddr) < DMC_V1_MAX_MMIO_COUNT); in parse_dmc_fw_header()
1017 mmioaddr = v3->mmioaddr; in parse_dmc_fw_header()
1032 mmioaddr = v1->mmioaddr; in parse_dmc_fw_header()
1057 if (!dmc_mmio_addr_sanity_check(dmc, mmioaddr, mmio_count, in parse_dmc_fw_header()
1065 dmc_info->mmioaddr[i] = _MMIO(mmioaddr[i]); in parse_dmc_fw_header()
1069 i, mmioaddr[i], mmiodata[i], in parse_dmc_fw_header()
1070 is_dmc_evt_ctl_reg(display, dmc_id, dmc_info->mmioaddr[i]) ? " (EVT_CTL)" : in parse_dmc_fw_header()
1071 is_dmc_evt_htp_reg(display, dmc_id, dmc_info->mmioaddr[i]) ? " (EVT_HTP)" : "", in parse_dmc_fw_header()
1072 disable_dmc_evt(display, dmc_id, dmc_info->mmioaddr[i], in parse_dmc_fw_header()