Lines Matching refs:dpcd
183 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in max_dprx_rate()
190 if (max_rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) { in max_dprx_rate()
205 return drm_dp_max_lane_count(intel_dp->dpcd); in max_dprx_lane_count()
251 if (drm_dp_128b132b_supported(intel_dp->dpcd)) { in intel_dp_set_dpcd_sink_rates()
1118 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_rgb()
1135 if (!drm_dp_is_branch(intel_dp->dpcd)) in dfp_can_convert_from_ycbcr444()
1173 (!drm_dp_is_branch(intel_dp->dpcd) || in intel_dp_output_format()
3248 drm_dp_enhanced_frame_cap(intel_dp->dpcd); in intel_dp_compute_config()
3370 return intel_dp->dpcd[DP_DPCD_REV] == 0x11 && in downstream_hpd_needs_d0()
3371 drm_dp_is_branch(intel_dp->dpcd) && in downstream_hpd_needs_d0()
3608 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_set_power()
3667 if (crtc_state && intel_dp->dpcd[DP_DPCD_REV] == 0) { in intel_dp_sync_state()
3735 if (!drm_dp_is_branch(intel_dp->dpcd)) in intel_dp_get_pcon_dsc_cap()
3884 if (drm_dp_is_branch(intel_dp->dpcd) && in intel_dp_is_hdmi_2_1_sink()
4051 if (intel_dp->dpcd[DP_DPCD_REV] < 0x13) in intel_dp_configure_protocol_converter()
4054 if (!drm_dp_is_branch(intel_dp->dpcd)) in intel_dp_configure_protocol_converter()
4185 intel_dp_get_dsc_sink_cap(intel_dp->dpcd[DP_DPCD_REV], in intel_dp_detect_dsc_caps()
4258 if (mso % 2 || mso > drm_dp_max_lane_count(intel_dp->dpcd)) { in intel_edp_mso_init()
4266 mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso, in intel_edp_mso_init()
4313 if (rate >= 810000 && !drm_dp_tps4_supported(intel_dp->dpcd)) { in intel_edp_set_sink_rates()
4341 drm_WARN_ON(display->drm, intel_dp->dpcd[DP_DPCD_REV] != 0); in intel_edp_init_dpcd()
4343 if (drm_dp_read_dpcd_caps(&intel_dp->aux, intel_dp->dpcd) != 0) in intel_edp_init_dpcd()
4347 drm_dp_is_branch(intel_dp->dpcd)); in intel_edp_init_dpcd()
4400 intel_dp->dpcd, in intel_dp_has_sink_count()
4425 drm_dp_is_branch(intel_dp->dpcd)); in intel_dp_get_dpcd()
4458 return drm_dp_read_downstream_info(&intel_dp->aux, intel_dp->dpcd, in intel_dp_get_dpcd()
4485 !(intel_dp->dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_128B132B)) in intel_dp_mst_mode_choose()
4499 sink_mst_mode = drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd); in intel_dp_mst_detect()
5410 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_check_device_service_irq()
5435 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_check_link_service_irq()
5519 u8 *dpcd = intel_dp->dpcd; in intel_dp_detect_dpcd() local
5533 if (!drm_dp_is_branch(dpcd)) in intel_dp_detect_dpcd()
5551 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in intel_dp_detect_dpcd()
5557 type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & in intel_dp_detect_dpcd()
5664 drm_dp_downstream_max_bpc(intel_dp->dpcd, in intel_dp_update_dfp()
5668 drm_dp_downstream_max_dotclock(intel_dp->dpcd, in intel_dp_update_dfp()
5672 drm_dp_downstream_min_tmds_clock(intel_dp->dpcd, in intel_dp_update_dfp()
5676 drm_dp_downstream_max_tmds_clock(intel_dp->dpcd, in intel_dp_update_dfp()
5681 drm_dp_get_pcon_max_frl_bw(intel_dp->dpcd, in intel_dp_update_dfp()
5700 (!drm_dp_is_branch(intel_dp->dpcd) || intel_dp->dfp.ycbcr420_passthrough)) in intel_dp_can_ycbcr420()
5721 drm_dp_downstream_420_passthrough(intel_dp->dpcd, in intel_dp_update_420()
5726 drm_dp_downstream_444_to_420_conversion(intel_dp->dpcd, in intel_dp_update_420()
5729 drm_dp_downstream_rgb_to_ycbcr_conversion(intel_dp->dpcd, in intel_dp_update_420()
5799 drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd); in intel_dp_detect_sdp_caps()
5957 intel_dp->dpcd, in intel_dp_detect()
6009 intel_dp->dpcd, in intel_dp_get_modes()
6325 u8 dpcd[DP_RECEIVER_CAP_SIZE]; in intel_dp_hpd_pulse() local
6361 intel_dp_read_dprx_caps(intel_dp, dpcd); in intel_dp_hpd_pulse()
6581 if (DISPLAY_VER(display) == 9 && drm_dp_is_branch(intel_dp->dpcd) && in intel_edp_init_connector()
6582 (intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_TYPE_MASK) == in intel_edp_init_connector()