Lines Matching refs:plane_state
136 static unsigned int intel_fbc_plane_stride(const struct intel_plane_state *plane_state) in intel_fbc_plane_stride() argument
138 const struct drm_framebuffer *fb = plane_state->hw.fb; in intel_fbc_plane_stride()
141 stride = plane_state->view.color_plane[0].mapping_stride; in intel_fbc_plane_stride()
142 if (!drm_rotation_90_or_270(plane_state->hw.rotation)) in intel_fbc_plane_stride()
154 static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *plane_state) in intel_fbc_plane_cfb_stride() argument
158 return intel_fbc_plane_stride(plane_state) * cpp; in intel_fbc_plane_cfb_stride()
205 static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state) in intel_fbc_cfb_stride() argument
207 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_cfb_stride()
208 unsigned int stride = intel_fbc_plane_cfb_stride(plane_state); in intel_fbc_cfb_stride()
209 unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16; in intel_fbc_cfb_stride()
236 static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state) in intel_fbc_cfb_size() argument
238 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_cfb_size()
239 unsigned int height = drm_rect_height(&plane_state->uapi.src) >> 16; in intel_fbc_cfb_size()
241 return _intel_fbc_cfb_size(display, height, intel_fbc_cfb_stride(plane_state)); in intel_fbc_cfb_size()
244 static u16 intel_fbc_override_cfb_stride(const struct intel_plane_state *plane_state) in intel_fbc_override_cfb_stride() argument
246 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_override_cfb_stride()
247 unsigned int stride_aligned = intel_fbc_cfb_stride(plane_state); in intel_fbc_override_cfb_stride()
248 unsigned int stride = intel_fbc_plane_cfb_stride(plane_state); in intel_fbc_override_cfb_stride()
249 const struct drm_framebuffer *fb = plane_state->hw.fb; in intel_fbc_override_cfb_stride()
820 static int intel_fbc_min_limit(const struct intel_plane_state *plane_state) in intel_fbc_min_limit() argument
822 return plane_state->hw.fb->format->cpp[0] == 2 ? 2 : 1; in intel_fbc_min_limit()
978 static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state *plane_state) in i8xx_fbc_stride_is_valid() argument
980 const struct drm_framebuffer *fb = plane_state->hw.fb; in i8xx_fbc_stride_is_valid()
981 unsigned int stride = intel_fbc_plane_stride(plane_state) * in i8xx_fbc_stride_is_valid()
987 static bool i965_fbc_stride_is_valid(const struct intel_plane_state *plane_state) in i965_fbc_stride_is_valid() argument
989 const struct drm_framebuffer *fb = plane_state->hw.fb; in i965_fbc_stride_is_valid()
990 unsigned int stride = intel_fbc_plane_stride(plane_state) * in i965_fbc_stride_is_valid()
996 static bool g4x_fbc_stride_is_valid(const struct intel_plane_state *plane_state) in g4x_fbc_stride_is_valid() argument
1001 static bool skl_fbc_stride_is_valid(const struct intel_plane_state *plane_state) in skl_fbc_stride_is_valid() argument
1003 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_fbc_stride_is_valid()
1004 unsigned int stride = intel_fbc_plane_stride(plane_state) * in skl_fbc_stride_is_valid()
1014 static bool icl_fbc_stride_is_valid(const struct intel_plane_state *plane_state) in icl_fbc_stride_is_valid() argument
1019 static bool stride_is_valid(const struct intel_plane_state *plane_state) in stride_is_valid() argument
1021 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in stride_is_valid()
1024 return icl_fbc_stride_is_valid(plane_state); in stride_is_valid()
1026 return skl_fbc_stride_is_valid(plane_state); in stride_is_valid()
1028 return g4x_fbc_stride_is_valid(plane_state); in stride_is_valid()
1030 return i965_fbc_stride_is_valid(plane_state); in stride_is_valid()
1032 return i8xx_fbc_stride_is_valid(plane_state); in stride_is_valid()
1035 static bool i8xx_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state) in i8xx_fbc_pixel_format_is_valid() argument
1037 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in i8xx_fbc_pixel_format_is_valid()
1038 const struct drm_framebuffer *fb = plane_state->hw.fb; in i8xx_fbc_pixel_format_is_valid()
1055 static bool g4x_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state) in g4x_fbc_pixel_format_is_valid() argument
1057 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in g4x_fbc_pixel_format_is_valid()
1058 const struct drm_framebuffer *fb = plane_state->hw.fb; in g4x_fbc_pixel_format_is_valid()
1074 static bool lnl_fbc_pixel_format_is_valid(const struct intel_plane_state *plane_state) in lnl_fbc_pixel_format_is_valid() argument
1076 const struct drm_framebuffer *fb = plane_state->hw.fb; in lnl_fbc_pixel_format_is_valid()
1090 static bool pixel_format_is_valid(const struct intel_plane_state *plane_state) in pixel_format_is_valid() argument
1092 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in pixel_format_is_valid()
1095 return lnl_fbc_pixel_format_is_valid(plane_state); in pixel_format_is_valid()
1097 return g4x_fbc_pixel_format_is_valid(plane_state); in pixel_format_is_valid()
1099 return i8xx_fbc_pixel_format_is_valid(plane_state); in pixel_format_is_valid()
1102 static bool i8xx_fbc_rotation_is_valid(const struct intel_plane_state *plane_state) in i8xx_fbc_rotation_is_valid() argument
1104 return plane_state->hw.rotation == DRM_MODE_ROTATE_0; in i8xx_fbc_rotation_is_valid()
1107 static bool g4x_fbc_rotation_is_valid(const struct intel_plane_state *plane_state) in g4x_fbc_rotation_is_valid() argument
1112 static bool skl_fbc_rotation_is_valid(const struct intel_plane_state *plane_state) in skl_fbc_rotation_is_valid() argument
1114 const struct drm_framebuffer *fb = plane_state->hw.fb; in skl_fbc_rotation_is_valid()
1115 unsigned int rotation = plane_state->hw.rotation; in skl_fbc_rotation_is_valid()
1124 static bool rotation_is_valid(const struct intel_plane_state *plane_state) in rotation_is_valid() argument
1126 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in rotation_is_valid()
1129 return skl_fbc_rotation_is_valid(plane_state); in rotation_is_valid()
1131 return g4x_fbc_rotation_is_valid(plane_state); in rotation_is_valid()
1133 return i8xx_fbc_rotation_is_valid(plane_state); in rotation_is_valid()
1163 static bool intel_fbc_surface_size_ok(const struct intel_plane_state *plane_state) in intel_fbc_surface_size_ok() argument
1165 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_surface_size_ok()
1170 effective_w = plane_state->view.color_plane[0].x + in intel_fbc_surface_size_ok()
1171 (drm_rect_width(&plane_state->uapi.src) >> 16); in intel_fbc_surface_size_ok()
1172 effective_h = plane_state->view.color_plane[0].y + in intel_fbc_surface_size_ok()
1173 (drm_rect_height(&plane_state->uapi.src) >> 16); in intel_fbc_surface_size_ok()
1196 static bool intel_fbc_plane_size_valid(const struct intel_plane_state *plane_state) in intel_fbc_plane_size_valid() argument
1198 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_plane_size_valid()
1203 w = drm_rect_width(&plane_state->uapi.src) >> 16; in intel_fbc_plane_size_valid()
1204 h = drm_rect_height(&plane_state->uapi.src) >> 16; in intel_fbc_plane_size_valid()
1209 static bool i8xx_fbc_tiling_valid(const struct intel_plane_state *plane_state) in i8xx_fbc_tiling_valid() argument
1211 const struct drm_framebuffer *fb = plane_state->hw.fb; in i8xx_fbc_tiling_valid()
1216 static bool skl_fbc_tiling_valid(const struct intel_plane_state *plane_state) in skl_fbc_tiling_valid() argument
1221 static bool tiling_is_valid(const struct intel_plane_state *plane_state) in tiling_is_valid() argument
1223 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in tiling_is_valid()
1226 return skl_fbc_tiling_valid(plane_state); in tiling_is_valid()
1228 return i8xx_fbc_tiling_valid(plane_state); in tiling_is_valid()
1285 const struct intel_plane_state *plane_state) in intel_fbc_hw_intialize_dirty_rect() argument
1294 drm_rect_fp_to_int(&src, &plane_state->uapi.src); in intel_fbc_hw_intialize_dirty_rect()
1306 const struct intel_plane_state *plane_state = in intel_fbc_update_state() local
1311 WARN_ON(plane_state->no_fbc_reason); in intel_fbc_update_state()
1319 fbc_state->fence_y_offset = intel_plane_fence_y_offset(plane_state); in intel_fbc_update_state()
1321 drm_WARN_ON(display->drm, plane_state->flags & PLANE_HAS_FENCE && in intel_fbc_update_state()
1324 if (plane_state->flags & PLANE_HAS_FENCE) in intel_fbc_update_state()
1325 fbc_state->fence_id = i915_vma_fence_id(plane_state->ggtt_vma); in intel_fbc_update_state()
1329 fbc_state->cfb_stride = intel_fbc_cfb_stride(plane_state); in intel_fbc_update_state()
1330 fbc_state->cfb_size = intel_fbc_cfb_size(plane_state); in intel_fbc_update_state()
1331 fbc_state->override_cfb_stride = intel_fbc_override_cfb_stride(plane_state); in intel_fbc_update_state()
1334 static bool intel_fbc_is_fence_ok(const struct intel_plane_state *plane_state) in intel_fbc_is_fence_ok() argument
1336 struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); in intel_fbc_is_fence_ok()
1351 (plane_state->flags & PLANE_HAS_FENCE && in intel_fbc_is_fence_ok()
1352 i915_vma_fence_id(plane_state->ggtt_vma) != -1); in intel_fbc_is_fence_ok()
1355 static bool intel_fbc_is_cfb_ok(const struct intel_plane_state *plane_state) in intel_fbc_is_cfb_ok() argument
1357 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_fbc_is_cfb_ok()
1360 return intel_fbc_min_limit(plane_state) <= fbc->limit && in intel_fbc_is_cfb_ok()
1361 intel_fbc_cfb_size(plane_state) <= fbc->limit * in intel_fbc_is_cfb_ok()
1365 static bool intel_fbc_is_ok(const struct intel_plane_state *plane_state) in intel_fbc_is_ok() argument
1367 return !plane_state->no_fbc_reason && in intel_fbc_is_ok()
1368 intel_fbc_is_fence_ok(plane_state) && in intel_fbc_is_ok()
1369 intel_fbc_is_cfb_ok(plane_state); in intel_fbc_is_ok()
1373 __intel_fbc_prepare_dirty_rect(const struct intel_plane_state *plane_state, in __intel_fbc_prepare_dirty_rect() argument
1376 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in __intel_fbc_prepare_dirty_rect()
1379 int width = drm_rect_width(&plane_state->uapi.src) >> 16; in __intel_fbc_prepare_dirty_rect()
1380 const struct drm_rect *damage = &plane_state->damage; in __intel_fbc_prepare_dirty_rect()
1381 int y_offset = plane_state->view.color_plane[0].y; in __intel_fbc_prepare_dirty_rect()
1386 !intel_fbc_is_ok(plane_state)) { in __intel_fbc_prepare_dirty_rect()
1405 struct intel_plane_state *plane_state; in intel_fbc_prepare_dirty_rect() local
1412 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_fbc_prepare_dirty_rect()
1421 __intel_fbc_prepare_dirty_rect(plane_state, in intel_fbc_prepare_dirty_rect()
1433 struct intel_plane_state *plane_state = in intel_fbc_check_plane() local
1435 const struct drm_framebuffer *fb = plane_state->hw.fb; in intel_fbc_check_plane()
1436 struct intel_crtc *crtc = to_intel_crtc(plane_state->hw.crtc); in intel_fbc_check_plane()
1444 plane_state->no_fbc_reason = "stolen memory not initialised"; in intel_fbc_check_plane()
1449 plane_state->no_fbc_reason = "VGPU active"; in intel_fbc_check_plane()
1454 plane_state->no_fbc_reason = "disabled per module param or by default"; in intel_fbc_check_plane()
1458 if (!plane_state->uapi.visible) { in intel_fbc_check_plane()
1459 plane_state->no_fbc_reason = "plane not visible"; in intel_fbc_check_plane()
1464 plane_state->no_fbc_reason = "Wa_16023588340"; in intel_fbc_check_plane()
1470 plane_state->no_fbc_reason = "VT-d enabled"; in intel_fbc_check_plane()
1477 plane_state->no_fbc_reason = "interlaced mode not supported"; in intel_fbc_check_plane()
1482 plane_state->no_fbc_reason = "double wide pipe not supported"; in intel_fbc_check_plane()
1499 plane_state->no_fbc_reason = "Selective update enabled"; in intel_fbc_check_plane()
1507 plane_state->no_fbc_reason = "PSR1 enabled (Wa_14016291713)"; in intel_fbc_check_plane()
1511 if (!pixel_format_is_valid(plane_state)) { in intel_fbc_check_plane()
1512 plane_state->no_fbc_reason = "pixel format not supported"; in intel_fbc_check_plane()
1516 if (!tiling_is_valid(plane_state)) { in intel_fbc_check_plane()
1517 plane_state->no_fbc_reason = "tiling not supported"; in intel_fbc_check_plane()
1521 if (!rotation_is_valid(plane_state)) { in intel_fbc_check_plane()
1522 plane_state->no_fbc_reason = "rotation not supported"; in intel_fbc_check_plane()
1526 if (!stride_is_valid(plane_state)) { in intel_fbc_check_plane()
1527 plane_state->no_fbc_reason = "stride not supported"; in intel_fbc_check_plane()
1532 plane_state->hw.pixel_blend_mode != DRM_MODE_BLEND_PIXEL_NONE && in intel_fbc_check_plane()
1534 plane_state->no_fbc_reason = "per-pixel alpha not supported"; in intel_fbc_check_plane()
1538 if (!intel_fbc_plane_size_valid(plane_state)) { in intel_fbc_check_plane()
1539 plane_state->no_fbc_reason = "plane size too big"; in intel_fbc_check_plane()
1543 if (!intel_fbc_surface_size_ok(plane_state)) { in intel_fbc_check_plane()
1544 plane_state->no_fbc_reason = "surface size too big"; in intel_fbc_check_plane()
1554 plane_state->view.color_plane[0].y & 3) { in intel_fbc_check_plane()
1555 plane_state->no_fbc_reason = "plane start Y offset misaligned"; in intel_fbc_check_plane()
1561 (plane_state->view.color_plane[0].y + in intel_fbc_check_plane()
1562 (drm_rect_height(&plane_state->uapi.src) >> 16)) & 3) { in intel_fbc_check_plane()
1563 plane_state->no_fbc_reason = "plane end Y offset misaligned"; in intel_fbc_check_plane()
1576 plane_state->no_fbc_reason = "pixel rate too high"; in intel_fbc_check_plane()
1581 plane_state->no_fbc_reason = NULL; in intel_fbc_check_plane()
1672 const struct intel_plane_state __maybe_unused *plane_state; in intel_fbc_pre_update() local
1677 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_fbc_pre_update()
1731 const struct intel_plane_state __maybe_unused *plane_state; in intel_fbc_post_update() local
1735 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_fbc_post_update()
1830 struct intel_plane_state __maybe_unused *plane_state; in intel_fbc_atomic_check() local
1834 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_fbc_atomic_check()
1850 const struct intel_plane_state *plane_state = in __intel_fbc_enable() local
1860 if (intel_fbc_is_ok(plane_state)) { in __intel_fbc_enable()
1870 fbc->no_fbc_reason = plane_state->no_fbc_reason; in __intel_fbc_enable()
1874 if (!intel_fbc_is_fence_ok(plane_state)) { in __intel_fbc_enable()
1884 if (intel_fbc_alloc_cfb(fbc, intel_fbc_cfb_size(plane_state), in __intel_fbc_enable()
1885 intel_fbc_min_limit(plane_state))) { in __intel_fbc_enable()
1897 intel_fbc_hw_intialize_dirty_rect(fbc, plane_state); in __intel_fbc_enable()
1932 const struct intel_plane_state *plane_state; in intel_fbc_update() local
1936 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_fbc_update()
1945 plane_state->no_fbc_reason) { in intel_fbc_update()
2169 const struct intel_plane_state *plane_state = in intel_fbc_debugfs_status_show() local
2178 plane_state->no_fbc_reason ?: "FBC possible"); in intel_fbc_debugfs_status_show()