Lines Matching refs:intel_de_read
42 cur_state = intel_de_read(display, in assert_fdi_tx()
45 cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE; in assert_fdi_tx()
67 cur_state = intel_de_read(display, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE; in assert_fdi_rx()
95 cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_PLL_ENABLE; in assert_fdi_tx_pll_enabled()
105 cur_state = intel_de_read(display, FDI_RX_CTL(pipe)) & FDI_RX_PLL_ENABLE; in assert_fdi_rx_pll()
274 fdi_pll_clk = intel_de_read(display, FDI_PLL_BIOS_0) & FDI_PLL_FB_CLOCK_MASK; in intel_fdi_pll_freq_update()
421 temp = intel_de_read(display, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
426 intel_de_read(display, FDI_RX_CTL(PIPE_B)) & in cpt_set_fdi_bc_bifurcation()
429 intel_de_read(display, FDI_RX_CTL(PIPE_C)) & in cpt_set_fdi_bc_bifurcation()
475 temp = intel_de_read(display, reg); in intel_fdi_normal_train()
486 temp = intel_de_read(display, reg); in intel_fdi_normal_train()
519 intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK); in ilk_fdi_link_train()
527 temp = intel_de_read(display, reg); in ilk_fdi_link_train()
531 intel_de_read(display, reg); in ilk_fdi_link_train()
536 temp = intel_de_read(display, reg); in ilk_fdi_link_train()
544 temp = intel_de_read(display, reg); in ilk_fdi_link_train()
560 temp = intel_de_read(display, reg); in ilk_fdi_link_train()
582 temp = intel_de_read(display, reg); in ilk_fdi_link_train()
620 intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK); in gen6_fdi_link_train()
625 temp = intel_de_read(display, reg); in gen6_fdi_link_train()
635 temp = intel_de_read(display, reg); in gen6_fdi_link_train()
649 temp = intel_de_read(display, reg); in gen6_fdi_link_train()
670 temp = intel_de_read(display, reg); in gen6_fdi_link_train()
689 temp = intel_de_read(display, reg); in gen6_fdi_link_train()
700 temp = intel_de_read(display, reg); in gen6_fdi_link_train()
721 temp = intel_de_read(display, reg); in gen6_fdi_link_train()
757 intel_de_read(display, PIPE_DATA_M1(display, pipe)) & TU_SIZE_MASK); in ivb_manual_fdi_link_train()
762 temp = intel_de_read(display, reg); in ivb_manual_fdi_link_train()
771 intel_de_read(display, FDI_RX_IIR(pipe))); in ivb_manual_fdi_link_train()
777 temp = intel_de_read(display, reg); in ivb_manual_fdi_link_train()
783 temp = intel_de_read(display, reg); in ivb_manual_fdi_link_train()
791 temp = intel_de_read(display, reg); in ivb_manual_fdi_link_train()
804 temp = intel_de_read(display, reg); in ivb_manual_fdi_link_train()
814 temp = intel_de_read(display, reg); in ivb_manual_fdi_link_train()
818 (intel_de_read(display, reg) & FDI_RX_BIT_LOCK)) { in ivb_manual_fdi_link_train()
846 temp = intel_de_read(display, reg); in ivb_manual_fdi_link_train()
850 (intel_de_read(display, reg) & FDI_RX_SYMBOL_LOCK)) { in ivb_manual_fdi_link_train()
958 temp = intel_de_read(display, DP_TP_STATUS(PORT_E)); in hsw_fdi_link_train()
1033 temp = intel_de_read(display, reg); in ilk_fdi_pll_enable()
1036 temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_pll_enable()
1049 temp = intel_de_read(display, reg); in ilk_fdi_pll_enable()
1089 temp = intel_de_read(display, reg); in ilk_fdi_disable()
1091 temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1107 temp = intel_de_read(display, reg); in ilk_fdi_disable()
1117 temp |= (intel_de_read(display, TRANSCONF(display, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()