Lines Matching refs:plane
67 struct intel_plane *plane) in intel_plane_state_reset() argument
71 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
79 struct intel_plane *plane; in intel_plane_alloc() local
81 plane = kzalloc(sizeof(*plane), GFP_KERNEL); in intel_plane_alloc()
82 if (!plane) in intel_plane_alloc()
87 kfree(plane); in intel_plane_alloc()
91 intel_plane_state_reset(plane_state, plane); in intel_plane_alloc()
93 plane->base.state = &plane_state->uapi; in intel_plane_alloc()
95 return plane; in intel_plane_alloc()
98 void intel_plane_free(struct intel_plane *plane) in intel_plane_free() argument
100 intel_plane_destroy_state(&plane->base, plane->base.state); in intel_plane_free()
101 kfree(plane); in intel_plane_free()
111 void intel_plane_destroy(struct drm_plane *plane) in intel_plane_destroy() argument
113 drm_plane_cleanup(plane); in intel_plane_destroy()
114 kfree(to_intel_plane(plane)); in intel_plane_destroy()
127 intel_plane_duplicate_state(struct drm_plane *plane) in intel_plane_duplicate_state() argument
131 intel_state = to_intel_plane_state(plane->state); in intel_plane_duplicate_state()
137 __drm_atomic_helper_plane_duplicate_state(plane, &intel_state->uapi); in intel_plane_duplicate_state()
160 intel_plane_destroy_state(struct drm_plane *plane, in intel_plane_destroy_state() argument
165 drm_WARN_ON(plane->dev, plane_state->ggtt_vma); in intel_plane_destroy_state()
166 drm_WARN_ON(plane->dev, plane_state->dpt_vma); in intel_plane_destroy_state()
174 bool intel_plane_needs_physical(struct intel_plane *plane) in intel_plane_needs_physical() argument
176 struct intel_display *display = to_intel_display(plane); in intel_plane_needs_physical()
178 return plane->id == PLANE_CURSOR && in intel_plane_needs_physical()
182 bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, in intel_plane_can_async_flip() argument
189 return plane->can_async_flip && plane->can_async_flip(modifier); in intel_plane_can_async_flip()
192 bool intel_plane_format_mod_supported_async(struct drm_plane *plane, in intel_plane_format_mod_supported_async() argument
196 if (!plane->funcs->format_mod_supported(plane, format, modifier)) in intel_plane_format_mod_supported_async()
199 return intel_plane_can_async_flip(to_intel_plane(plane), in intel_plane_format_mod_supported_async()
260 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_relative_data_rate() local
265 if (plane->id == PLANE_CURSOR) in intel_plane_relative_data_rate()
286 skl_plane_relative_data_rate(crtc_state, plane, width, height, in intel_plane_relative_data_rate()
297 struct intel_plane *plane, in intel_plane_calc_min_cdclk() argument
300 struct intel_display *display = to_intel_display(plane); in intel_plane_calc_min_cdclk()
302 intel_atomic_get_new_plane_state(state, plane); in intel_plane_calc_min_cdclk()
308 if (!plane_state->uapi.visible || !plane->min_cdclk) in intel_plane_calc_min_cdclk()
314 new_crtc_state->min_cdclk[plane->id] = in intel_plane_calc_min_cdclk()
315 plane->min_cdclk(new_crtc_state, plane_state); in intel_plane_calc_min_cdclk()
325 if (new_crtc_state->min_cdclk[plane->id] <= in intel_plane_calc_min_cdclk()
326 old_crtc_state->min_cdclk[plane->id]) in intel_plane_calc_min_cdclk()
341 if (new_crtc_state->min_cdclk[plane->id] <= in intel_plane_calc_min_cdclk()
347 plane->base.base.id, plane->base.name, in intel_plane_calc_min_cdclk()
348 new_crtc_state->min_cdclk[plane->id], in intel_plane_calc_min_cdclk()
428 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_set_invisible() local
430 crtc_state->active_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
431 crtc_state->scaled_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
432 crtc_state->nv12_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
433 crtc_state->c8_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
434 crtc_state->async_flip_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
435 crtc_state->data_rate[plane->id] = 0; in intel_plane_set_invisible()
436 crtc_state->data_rate_y[plane->id] = 0; in intel_plane_set_invisible()
437 crtc_state->rel_data_rate[plane->id] = 0; in intel_plane_set_invisible()
438 crtc_state->rel_data_rate_y[plane->id] = 0; in intel_plane_set_invisible()
439 crtc_state->min_cdclk[plane->id] = 0; in intel_plane_set_invisible()
454 static bool intel_plane_do_async_flip(struct intel_plane *plane, in intel_plane_do_async_flip() argument
458 struct intel_display *display = to_intel_display(plane); in intel_plane_do_async_flip()
460 if (!plane->async_flip) in intel_plane_do_async_flip()
486 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in i9xx_must_disable_cxsr() local
493 if (plane->id == PLANE_CURSOR) in i9xx_must_disable_cxsr()
515 if (plane->id == PLANE_PRIMARY) { in i9xx_must_disable_cxsr()
527 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in ilk_must_disable_cxsr() local
532 if (plane->id == PLANE_CURSOR) in ilk_must_disable_cxsr()
585 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in intel_plane_atomic_calc_changes() local
592 if (DISPLAY_VER(display) >= 9 && plane->id != PLANE_CURSOR) { in intel_plane_atomic_calc_changes()
628 plane->base.base.id, plane->base.name, in intel_plane_atomic_calc_changes()
633 new_crtc_state->fb_bits |= plane->frontbuffer_bit; in intel_plane_atomic_calc_changes()
643 if (intel_plane_do_async_flip(plane, old_crtc_state, new_crtc_state)) { in intel_plane_atomic_calc_changes()
645 new_crtc_state->async_flip_planes |= BIT(plane->id); in intel_plane_atomic_calc_changes()
646 } else if (plane->need_async_flip_toggle_wa && in intel_plane_atomic_calc_changes()
656 new_crtc_state->async_flip_planes |= BIT(plane->id); in intel_plane_atomic_calc_changes()
667 struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane); in intel_plane_atomic_check_with_state() local
672 new_crtc_state->enabled_planes &= ~BIT(plane->id); in intel_plane_atomic_check_with_state()
677 ret = plane->check_plane(new_crtc_state, new_plane_state); in intel_plane_atomic_check_with_state()
682 new_crtc_state->enabled_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
686 new_crtc_state->active_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
690 new_crtc_state->scaled_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
694 new_crtc_state->nv12_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
698 new_crtc_state->c8_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
701 new_crtc_state->update_planes |= BIT(plane->id); in intel_plane_atomic_check_with_state()
705 new_crtc_state->data_rate_y[plane->id] = in intel_plane_atomic_check_with_state()
707 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state()
710 new_crtc_state->rel_data_rate_y[plane->id] = in intel_plane_atomic_check_with_state()
713 new_crtc_state->rel_data_rate[plane->id] = in intel_plane_atomic_check_with_state()
717 new_crtc_state->data_rate[plane->id] = in intel_plane_atomic_check_with_state()
720 new_crtc_state->rel_data_rate[plane->id] = in intel_plane_atomic_check_with_state()
733 struct intel_plane *plane; in intel_crtc_get_plane() local
735 for_each_intel_plane_on_crtc(display->drm, crtc, plane) { in intel_crtc_get_plane()
736 if (plane->id == plane_id) in intel_crtc_get_plane()
737 return plane; in intel_crtc_get_plane()
744 struct intel_plane *plane) in plane_atomic_check() argument
748 intel_atomic_get_new_plane_state(state, plane); in plane_atomic_check()
750 intel_atomic_get_old_plane_state(state, plane); in plane_atomic_check()
753 struct intel_crtc *crtc = intel_crtc_for_pipe(display, plane->pipe); in plane_atomic_check()
763 intel_crtc_get_plane(primary_crtc, plane->id); in plane_atomic_check()
802 struct intel_plane *plane; in skl_next_plane_to_commit() local
808 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in skl_next_plane_to_commit()
809 enum plane_id plane_id = plane->id; in skl_next_plane_to_commit()
811 if (crtc->pipe != plane->pipe || in skl_next_plane_to_commit()
825 return plane; in skl_next_plane_to_commit()
835 struct intel_plane *plane, in intel_plane_update_noarm() argument
843 if (plane->fbc) in intel_plane_update_noarm()
844 intel_fbc_dirty_rect_update_noarm(dsb, plane); in intel_plane_update_noarm()
846 if (plane->update_noarm) in intel_plane_update_noarm()
847 plane->update_noarm(dsb, plane, crtc_state, plane_state); in intel_plane_update_noarm()
851 struct intel_plane *plane, in intel_plane_async_flip() argument
858 trace_intel_plane_async_flip(plane, crtc, async_flip); in intel_plane_async_flip()
859 plane->async_flip(dsb, plane, crtc_state, plane_state, async_flip); in intel_plane_async_flip()
863 struct intel_plane *plane, in intel_plane_update_arm() argument
869 if (crtc_state->do_async_flip && plane->async_flip) { in intel_plane_update_arm()
870 intel_plane_async_flip(dsb, plane, crtc_state, plane_state, true); in intel_plane_update_arm()
875 plane->update_arm(dsb, plane, crtc_state, plane_state); in intel_plane_update_arm()
879 struct intel_plane *plane, in intel_plane_disable_arm() argument
884 trace_intel_plane_disable_arm(plane, crtc); in intel_plane_disable_arm()
885 plane->disable_arm(dsb, plane, crtc_state); in intel_plane_disable_arm()
896 struct intel_plane *plane; in intel_crtc_planes_update_noarm() local
906 for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { in intel_crtc_planes_update_noarm()
907 if (crtc->pipe != plane->pipe || in intel_crtc_planes_update_noarm()
908 !(update_mask & BIT(plane->id))) in intel_crtc_planes_update_noarm()
914 intel_plane_update_noarm(dsb, plane, in intel_crtc_planes_update_noarm()
930 struct intel_plane *plane; in skl_crtc_planes_update_arm() local
937 while ((plane = skl_next_plane_to_commit(state, crtc, ddb, ddb_y, &update_mask))) { in skl_crtc_planes_update_arm()
939 intel_atomic_get_new_plane_state(state, plane); in skl_crtc_planes_update_arm()
947 intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state); in skl_crtc_planes_update_arm()
949 intel_plane_disable_arm(dsb, plane, new_crtc_state); in skl_crtc_planes_update_arm()
961 struct intel_plane *plane; in i9xx_crtc_planes_update_arm() local
964 for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) { in i9xx_crtc_planes_update_arm()
965 if (crtc->pipe != plane->pipe || in i9xx_crtc_planes_update_arm()
966 !(update_mask & BIT(plane->id))) in i9xx_crtc_planes_update_arm()
974 intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state); in i9xx_crtc_planes_update_arm()
976 intel_plane_disable_arm(dsb, plane, new_crtc_state); in i9xx_crtc_planes_update_arm()
998 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_check_clipping() local
1019 plane->base.base.id, plane->base.name, in intel_plane_check_clipping()
1036 plane->base.base.id, plane->base.name, in intel_plane_check_clipping()
1050 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in intel_plane_check_src_coordinates() local
1109 plane->base.base.id, plane->base.name, in intel_plane_check_src_coordinates()
1117 plane->base.base.id, plane->base.name, in intel_plane_check_src_coordinates()
1177 struct intel_plane *plane = to_intel_plane(_plane); in intel_prepare_plane_fb() local
1178 struct intel_display *display = to_intel_display(plane); in intel_prepare_plane_fb()
1184 intel_atomic_get_old_plane_state(state, plane); in intel_prepare_plane_fb()
1220 ret = drm_gem_plane_helper_prepare_fb(&plane->base, &new_plane_state->uapi); in intel_prepare_plane_fb()
1258 intel_cleanup_plane_fb(struct drm_plane *plane, in intel_cleanup_plane_fb() argument
1261 struct intel_display *display = to_intel_display(plane->dev); in intel_cleanup_plane_fb()
1321 static void intel_panic_flush(struct drm_plane *plane) in intel_panic_flush() argument
1323 struct intel_plane_state *plane_state = to_intel_plane_state(plane->state); in intel_panic_flush()
1324 struct intel_crtc_state *crtc_state = to_intel_crtc_state(plane->state->crtc->state); in intel_panic_flush()
1325 struct intel_plane *iplane = to_intel_plane(plane); in intel_panic_flush()
1380 static int intel_get_scanout_buffer(struct drm_plane *plane, in intel_get_scanout_buffer() argument
1387 struct intel_display *display = to_intel_display(plane->dev); in intel_get_scanout_buffer()
1389 if (!plane->state || !plane->state->fb || !plane->state->visible) in intel_get_scanout_buffer()
1392 plane_state = to_intel_plane_state(plane->state); in intel_get_scanout_buffer()
1440 void intel_plane_helper_add(struct intel_plane *plane) in intel_plane_helper_add() argument
1442 if (plane->base.type == DRM_PLANE_TYPE_PRIMARY) in intel_plane_helper_add()
1443 drm_plane_helper_add(&plane->base, &intel_primary_plane_helper_funcs); in intel_plane_helper_add()
1445 drm_plane_helper_add(&plane->base, &intel_plane_helper_funcs); in intel_plane_helper_add()
1464 struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); in link_nv12_planes()
1465 struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); in link_nv12_planes()
1500 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); in unlink_nv12_plane() local
1511 crtc_state->enabled_planes &= ~BIT(plane->id); in unlink_nv12_plane()
1512 crtc_state->active_planes &= ~BIT(plane->id); in unlink_nv12_plane()
1513 crtc_state->update_planes |= BIT(plane->id); in unlink_nv12_plane()
1514 crtc_state->data_rate[plane->id] = 0; in unlink_nv12_plane()
1515 crtc_state->rel_data_rate[plane->id] = 0; in unlink_nv12_plane()
1525 struct intel_plane *plane; in icl_check_nv12_planes() local
1535 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in icl_check_nv12_planes()
1536 if (plane->pipe != crtc->pipe) in icl_check_nv12_planes()
1546 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in icl_check_nv12_planes()
1550 if (plane->pipe != crtc->pipe) in icl_check_nv12_planes()
1553 if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) in icl_check_nv12_planes()
1589 struct intel_plane *plane; in intel_crtc_add_planes_to_state() local
1591 for_each_intel_plane_on_crtc(display->drm, crtc, plane) { in intel_crtc_add_planes_to_state()
1594 if ((plane_ids_mask & BIT(plane->id)) == 0) in intel_crtc_add_planes_to_state()
1597 plane_state = intel_atomic_get_plane_state(state, plane); in intel_crtc_add_planes_to_state()
1630 struct intel_plane *plane; in intel_joiner_affected_planes() local
1634 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_joiner_affected_planes()
1637 if ((joined_pipes & BIT(plane->pipe)) == 0) in intel_joiner_affected_planes()
1640 affected_planes |= BIT(plane->id); in intel_joiner_affected_planes()
1705 struct intel_plane *plane; in intel_plane_atomic_check() local
1713 for_each_new_intel_plane_in_state(state, plane, plane_state, i) { in intel_plane_atomic_check()
1714 ret = plane_atomic_check(state, plane); in intel_plane_atomic_check()
1718 plane->base.base.id, plane->base.name); in intel_plane_atomic_check()