Lines Matching refs:intel_de_read
105 intel_de_read(display, intel_dp->output_reg) & DP_PORT_EN, in vlv_power_sequencer_kick()
119 DP = intel_de_read(display, intel_dp->output_reg) & DP_DETECTED; in vlv_power_sequencer_kick()
129 pll_enabled = intel_de_read(display, DPLL(display, pipe)) & DPLL_VCO_ENABLE; in vlv_power_sequencer_kick()
282 return intel_de_read(display, PP_STATUS(display, pps_idx)) & PP_ON; in pps_has_pp_on()
287 return intel_de_read(display, PP_CONTROL(display, pps_idx)) & EDP_FORCE_VDD; in pps_has_vdd_on()
302 u32 port_sel = intel_de_read(display, in vlv_initial_pps_pipe()
381 return intel_de_read(display, SOUTH_CHICKEN1) & ICP_SECOND_PPS_IO_SELECT; in intel_pps_is_valid()
556 return (intel_de_read(display, _pp_stat_reg(intel_dp)) & PP_ON) != 0; in edp_have_panel_power()
569 return intel_de_read(display, _pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD; in edp_have_panel_vdd()
589 intel_de_read(display, _pp_stat_reg(intel_dp)), in intel_pps_check_power_unlocked()
590 intel_de_read(display, _pp_ctrl_reg(intel_dp))); in intel_pps_check_power_unlocked()
624 intel_de_read(display, pp_stat_reg), in wait_panel_status()
625 intel_de_read(display, pp_ctrl_reg)); in wait_panel_status()
632 intel_de_read(display, pp_stat_reg), in wait_panel_status()
633 intel_de_read(display, pp_ctrl_reg)); in wait_panel_status()
723 control = intel_de_read(display, _pp_ctrl_reg(intel_dp)); in ilk_get_pp_control()
779 intel_de_read(display, pp_stat_reg), in intel_pps_vdd_on_unlocked()
780 intel_de_read(display, pp_ctrl_reg)); in intel_pps_vdd_on_unlocked()
852 intel_de_read(display, pp_stat_reg), in intel_pps_vdd_off_sync_unlocked()
853 intel_de_read(display, pp_ctrl_reg)); in intel_pps_vdd_off_sync_unlocked()
1395 pp_on = intel_de_read(display, regs.pp_on); in intel_pps_readout_hw_state()
1396 pp_off = intel_de_read(display, regs.pp_off); in intel_pps_readout_hw_state()
1407 pp_div = intel_de_read(display, regs.pp_div); in intel_pps_readout_hw_state()
1676 intel_de_read(display, regs.pp_on), in pps_init_registers()
1677 intel_de_read(display, regs.pp_off), in pps_init_registers()
1679 intel_de_read(display, regs.pp_div) : in pps_init_registers()
1680 (intel_de_read(display, regs.pp_ctrl) & BXT_POWER_CYCLE_DELAY_MASK)); in pps_init_registers()
1846 port_sel = intel_de_read(display, PP_ON_DELAYS(display, 0)) & in assert_pps_unlocked()
1874 port_sel = intel_de_read(display, PP_ON_DELAYS(display, 0)) & in assert_pps_unlocked()
1882 val = intel_de_read(display, pp_reg); in assert_pps_unlocked()