Lines Matching refs:cpu_transcoder
321 enum transcoder cpu_transcoder) in psr_ctl_reg() argument
324 return EDP_PSR_CTL(display, cpu_transcoder); in psr_ctl_reg()
330 enum transcoder cpu_transcoder) in psr_debug_reg() argument
333 return EDP_PSR_DEBUG(display, cpu_transcoder); in psr_debug_reg()
339 enum transcoder cpu_transcoder) in psr_perf_cnt_reg() argument
342 return EDP_PSR_PERF_CNT(display, cpu_transcoder); in psr_perf_cnt_reg()
348 enum transcoder cpu_transcoder) in psr_status_reg() argument
351 return EDP_PSR_STATUS(display, cpu_transcoder); in psr_status_reg()
357 enum transcoder cpu_transcoder) in psr_imr_reg() argument
360 return TRANS_PSR_IMR(display, cpu_transcoder); in psr_imr_reg()
366 enum transcoder cpu_transcoder) in psr_iir_reg() argument
369 return TRANS_PSR_IIR(display, cpu_transcoder); in psr_iir_reg()
375 enum transcoder cpu_transcoder) in psr_aux_ctl_reg() argument
378 return EDP_PSR_AUX_CTL(display, cpu_transcoder); in psr_aux_ctl_reg()
384 enum transcoder cpu_transcoder, int i) in psr_aux_data_reg() argument
387 return EDP_PSR_AUX_DATA(display, cpu_transcoder, i); in psr_aux_data_reg()
395 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr_irq_control() local
406 intel_de_rmw(display, psr_imr_reg(display, cpu_transcoder), in psr_irq_control()
451 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_irq_handler() local
458 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
465 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
471 PSR_EVENT(display, cpu_transcoder), in intel_psr_irq_handler()
480 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
492 intel_de_rmw(display, psr_imr_reg(display, cpu_transcoder), in intel_psr_irq_handler()
700 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in hsw_psr_setup_aux() local
715 psr_aux_data_reg(display, cpu_transcoder, i >> 2), in hsw_psr_setup_aux()
730 intel_de_write(display, psr_aux_ctl_reg(display, cpu_transcoder), in hsw_psr_setup_aux()
910 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in hsw_activate_psr1() local
933 intel_de_rmw(display, psr_ctl_reg(display, cpu_transcoder), in hsw_activate_psr1()
997 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in dg2_activate_panel_replay() local
1006 intel_de_write(display, EDP_PSR2_CTL(display, cpu_transcoder), in dg2_activate_panel_replay()
1021 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in hsw_activate_psr2() local
1096 PSR2_MAN_TRK_CTL(display, cpu_transcoder)); in hsw_activate_psr2()
1100 PSR2_MAN_TRK_CTL(display, cpu_transcoder), 0); in hsw_activate_psr2()
1110 intel_de_write(display, psr_ctl_reg(display, cpu_transcoder), psr_val); in hsw_activate_psr2()
1112 intel_de_write(display, EDP_PSR2_CTL(display, cpu_transcoder), val); in hsw_activate_psr2()
1116 transcoder_has_psr2(struct intel_display *display, enum transcoder cpu_transcoder) in transcoder_has_psr2() argument
1119 return cpu_transcoder == TRANSCODER_A || cpu_transcoder == TRANSCODER_B; in transcoder_has_psr2()
1121 return cpu_transcoder == TRANSCODER_A; in transcoder_has_psr2()
1123 return cpu_transcoder == TRANSCODER_EDP; in transcoder_has_psr2()
1141 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr2_program_idle_frames() local
1143 intel_de_rmw(display, EDP_PSR2_CTL(display, cpu_transcoder), in psr2_program_idle_frames()
1449 if (!transcoder_has_psr2(display, crtc_state->cpu_transcoder)) { in intel_psr2_config_valid()
1452 transcoder_name(crtc_state->cpu_transcoder)); in intel_psr2_config_valid()
1748 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; in intel_psr_get_config() local
1781 PSR2_MAN_TRK_CTL(display, cpu_transcoder)); in intel_psr_get_config()
1790 TRANS_EXITLINE(display, cpu_transcoder)); in intel_psr_get_config()
1800 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_activate() local
1803 transcoder_has_psr2(display, cpu_transcoder) && in intel_psr_activate()
1804 intel_de_read(display, EDP_PSR2_CTL(display, cpu_transcoder)) & EDP_PSR2_ENABLE); in intel_psr_activate()
1807 intel_de_read(display, psr_ctl_reg(display, cpu_transcoder)) & EDP_PSR_ENABLE); in intel_psr_activate()
1857 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_enable_source() local
1913 intel_de_write(display, psr_debug_reg(display, cpu_transcoder), mask); in intel_psr_enable_source()
1923 TRANS_EXITLINE(display, cpu_transcoder), in intel_psr_enable_source()
1940 intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder), 0, in intel_psr_enable_source()
1952 intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder), in intel_psr_enable_source()
1959 MTL_CLKGATE_DIS_TRANS(display, cpu_transcoder), in intel_psr_enable_source()
1979 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr_interrupt_error_check() local
1993 val = intel_de_read(display, psr_iir_reg(display, cpu_transcoder)); in psr_interrupt_error_check()
2019 intel_dp->psr.transcoder = crtc_state->cpu_transcoder; in intel_psr_enable_locked()
2077 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_exit() local
2081 if (transcoder_has_psr2(display, cpu_transcoder)) { in intel_psr_exit()
2083 EDP_PSR2_CTL(display, cpu_transcoder)); in intel_psr_exit()
2088 psr_ctl_reg(display, cpu_transcoder)); in intel_psr_exit()
2101 EDP_PSR2_CTL(display, cpu_transcoder), in intel_psr_exit()
2113 psr_ctl_reg(display, cpu_transcoder), in intel_psr_exit()
2124 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_wait_exit_locked() local
2130 psr_status = EDP_PSR2_STATUS(display, cpu_transcoder); in intel_psr_wait_exit_locked()
2133 psr_status = psr_status_reg(display, cpu_transcoder); in intel_psr_wait_exit_locked()
2146 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_disable_locked() local
2175 MTL_CLKGATE_DIS_TRANS(display, cpu_transcoder), in intel_psr_disable_locked()
2464 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_psr2_program_trans_man_trk_ctl() local
2483 PSR2_MAN_TRK_CTL(display, cpu_transcoder), in intel_psr2_program_trans_man_trk_ctl()
2895 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_psr2_panic_force_full_update() local
2903 intel_de_write_fw(display, PSR2_MAN_TRK_CTL(display, cpu_transcoder), val); in intel_psr2_panic_force_full_update()
3009 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in _psr2_ready_for_pipe_update_locked() local
3017 EDP_PSR2_STATUS(display, cpu_transcoder), in _psr2_ready_for_pipe_update_locked()
3024 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in _psr1_ready_for_pipe_update_locked() local
3033 psr_status_reg(display, cpu_transcoder), in _psr1_ready_for_pipe_update_locked()
3076 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in __psr_wait_for_idle_locked() local
3086 reg = EDP_PSR2_STATUS(display, cpu_transcoder); in __psr_wait_for_idle_locked()
3089 reg = psr_status_reg(display, cpu_transcoder); in __psr_wait_for_idle_locked()
3259 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_configure_full_frame_update() local
3265 intel_de_write(display, LNL_SFF_CTL(cpu_transcoder), in intel_psr_configure_full_frame_update()
3269 PSR2_MAN_TRK_CTL(display, cpu_transcoder), in intel_psr_configure_full_frame_update()
3886 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in psr_source_status() local
3906 EDP_PSR2_STATUS(display, cpu_transcoder)); in psr_source_status()
3922 psr_status_reg(display, cpu_transcoder)); in psr_source_status()
3985 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_status() local
4009 val = intel_de_read(display, TRANS_DP2_CTL(cpu_transcoder)); in intel_psr_status()
4014 cpu_transcoder)); in intel_psr_status()
4019 EDP_PSR2_CTL(display, cpu_transcoder)); in intel_psr_status()
4022 val = intel_de_read(display, psr_ctl_reg(display, cpu_transcoder)); in intel_psr_status()
4037 val = intel_de_read(display, psr_perf_cnt_reg(display, cpu_transcoder)); in intel_psr_status()
4062 PSR2_SU_STATUS(display, cpu_transcoder, frame)); in intel_psr_status()