Lines Matching refs:display
21 struct intel_display *display = to_intel_display(connector); in intel_vrr_is_capable() local
49 return HAS_VRR(display) && in intel_vrr_is_capable()
88 static int intel_vrr_extra_vblank_delay(struct intel_display *display) in intel_vrr_extra_vblank_delay() argument
98 return DISPLAY_VER(display) < 13 ? 1 : 0; in intel_vrr_extra_vblank_delay()
103 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_vblank_delay() local
106 intel_vrr_extra_vblank_delay(display); in intel_vrr_vblank_delay()
109 static int intel_vrr_flipline_offset(struct intel_display *display) in intel_vrr_flipline_offset() argument
112 return DISPLAY_VER(display) < 13 ? 1 : 0; in intel_vrr_flipline_offset()
117 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_vmin_flipline() local
119 return crtc_state->vrr.vmin + intel_vrr_flipline_offset(display); in intel_vrr_vmin_flipline()
140 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_vblank_exit_length() local
142 if (DISPLAY_VER(display) >= 13) in intel_vrr_vblank_exit_length()
151 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_vmin_vtotal() local
154 if (DISPLAY_VER(display) >= 13) in intel_vrr_vmin_vtotal()
163 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_vmax_vtotal() local
165 if (DISPLAY_VER(display) >= 13) in intel_vrr_vmax_vtotal()
185 struct intel_display *display = to_intel_display(crtc_state); in is_cmrr_frac_required() local
190 if (!HAS_CMRR(display) || true) in is_cmrr_frac_required()
260 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_fixed_rr_vtotal() local
263 if (DISPLAY_VER(display) >= 13) in intel_vrr_fixed_rr_vtotal()
279 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_fixed_rr_vmin() local
282 intel_vrr_flipline_offset(display); in intel_vrr_fixed_rr_vmin()
293 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_set_fixed_rr_timings() local
299 intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), in intel_vrr_set_fixed_rr_timings()
301 intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), in intel_vrr_set_fixed_rr_timings()
303 intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), in intel_vrr_set_fixed_rr_timings()
349 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_compute_config() local
357 if (!HAS_VRR(display)) in intel_vrr_compute_config()
380 if (HAS_LRR(display)) in intel_vrr_compute_config()
404 crtc_state->vrr.vmin -= intel_vrr_flipline_offset(display); in intel_vrr_compute_config()
406 if (HAS_AS_SDP(display)) { in intel_vrr_compute_config()
418 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_compute_config_late() local
424 if (DISPLAY_VER(display) >= 13) { in intel_vrr_compute_config_late()
445 struct intel_display *display = to_intel_display(crtc_state); in trans_vrr_ctl() local
447 if (DISPLAY_VER(display) >= 14) in trans_vrr_ctl()
450 else if (DISPLAY_VER(display) >= 13) in trans_vrr_ctl()
461 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_set_transcoder_timings() local
469 if (IS_DISPLAY_VER(display, 12, 13)) in intel_vrr_set_transcoder_timings()
470 intel_de_rmw(display, CHICKEN_TRANS(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
474 intel_de_write(display, in intel_vrr_set_transcoder_timings()
475 TRANS_VRR_CTL(display, cpu_transcoder), 0); in intel_vrr_set_transcoder_timings()
480 intel_de_write(display, TRANS_CMRR_M_HI(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
482 intel_de_write(display, TRANS_CMRR_M_LO(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
484 intel_de_write(display, TRANS_CMRR_N_HI(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
486 intel_de_write(display, TRANS_CMRR_N_LO(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
492 if (!intel_vrr_always_use_vrr_tg(display) && !crtc_state->vrr.enable) in intel_vrr_set_transcoder_timings()
493 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
496 if (HAS_AS_SDP(display)) in intel_vrr_set_transcoder_timings()
497 intel_de_write(display, in intel_vrr_set_transcoder_timings()
498 TRANS_VRR_VSYNC(display, cpu_transcoder), in intel_vrr_set_transcoder_timings()
506 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_send_push() local
515 intel_de_write_dsb(display, dsb, in intel_vrr_send_push()
516 TRANS_PUSH(display, cpu_transcoder), in intel_vrr_send_push()
526 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_check_push_sent() local
548 intel_dsb_poll(dsb, TRANS_PUSH(display, cpu_transcoder), in intel_vrr_check_push_sent()
552 drm_err(display->drm, "[CRTC:%d:%s] VRR push send still pending\n", in intel_vrr_check_push_sent()
559 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_is_push_sent() local
565 return intel_de_read(display, TRANS_PUSH(display, cpu_transcoder)) & TRANS_PUSH_SEND; in intel_vrr_is_push_sent()
568 bool intel_vrr_always_use_vrr_tg(struct intel_display *display) in intel_vrr_always_use_vrr_tg() argument
570 if (!HAS_VRR(display)) in intel_vrr_always_use_vrr_tg()
573 if (DISPLAY_VER(display) >= 30) in intel_vrr_always_use_vrr_tg()
582 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_set_db_point_and_transmission_line() local
592 if (DISPLAY_VERx100(display) == 1401 || DISPLAY_VER(display) >= 20) in intel_vrr_set_db_point_and_transmission_line()
593 intel_de_write(display, in intel_vrr_set_db_point_and_transmission_line()
594 EMP_AS_SDP_TL(display, cpu_transcoder), in intel_vrr_set_db_point_and_transmission_line()
600 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_enable() local
606 intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), in intel_vrr_enable()
608 intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), in intel_vrr_enable()
610 intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), in intel_vrr_enable()
613 intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), in intel_vrr_enable()
616 if (!intel_vrr_always_use_vrr_tg(display)) { in intel_vrr_enable()
620 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_enable()
624 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_enable()
632 struct intel_display *display = to_intel_display(old_crtc_state); in intel_vrr_disable() local
638 if (!intel_vrr_always_use_vrr_tg(display)) { in intel_vrr_disable()
639 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_disable()
641 intel_de_wait_for_clear(display, in intel_vrr_disable()
642 TRANS_VRR_STATUS(display, cpu_transcoder), in intel_vrr_disable()
644 intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); in intel_vrr_disable()
652 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_transcoder_enable() local
655 if (!HAS_VRR(display)) in intel_vrr_transcoder_enable()
661 if (!intel_vrr_always_use_vrr_tg(display)) { in intel_vrr_transcoder_enable()
662 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_transcoder_enable()
667 intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), in intel_vrr_transcoder_enable()
672 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), in intel_vrr_transcoder_enable()
678 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_transcoder_disable() local
681 if (!HAS_VRR(display)) in intel_vrr_transcoder_disable()
687 intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), 0); in intel_vrr_transcoder_disable()
689 intel_de_wait_for_clear(display, TRANS_VRR_STATUS(display, cpu_transcoder), in intel_vrr_transcoder_disable()
691 intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); in intel_vrr_transcoder_disable()
703 struct intel_display *display = to_intel_display(crtc_state); in intel_vrr_get_config() local
708 trans_vrr_ctl = intel_de_read(display, in intel_vrr_get_config()
709 TRANS_VRR_CTL(display, cpu_transcoder)); in intel_vrr_get_config()
711 if (HAS_CMRR(display)) in intel_vrr_get_config()
716 intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder), in intel_vrr_get_config()
717 TRANS_CMRR_N_HI(display, cpu_transcoder)); in intel_vrr_get_config()
719 intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder), in intel_vrr_get_config()
720 TRANS_CMRR_M_HI(display, cpu_transcoder)); in intel_vrr_get_config()
723 if (DISPLAY_VER(display) >= 13) in intel_vrr_get_config()
732 crtc_state->vrr.flipline = intel_de_read(display, in intel_vrr_get_config()
733 TRANS_VRR_FLIPLINE(display, cpu_transcoder)) + 1; in intel_vrr_get_config()
734 crtc_state->vrr.vmax = intel_de_read(display, in intel_vrr_get_config()
735 TRANS_VRR_VMAX(display, cpu_transcoder)) + 1; in intel_vrr_get_config()
736 crtc_state->vrr.vmin = intel_de_read(display, in intel_vrr_get_config()
737 TRANS_VRR_VMIN(display, cpu_transcoder)) + 1; in intel_vrr_get_config()
745 if (intel_vrr_always_use_vrr_tg(display)) in intel_vrr_get_config()
749 if (HAS_AS_SDP(display)) { in intel_vrr_get_config()
751 intel_de_read(display, in intel_vrr_get_config()
752 TRANS_VRR_VSYNC(display, cpu_transcoder)); in intel_vrr_get_config()
762 if (intel_vrr_always_use_vrr_tg(display)) in intel_vrr_get_config()