Lines Matching refs:fw_dev
51 const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries; in pvr_fw_find_layout_entry()
52 u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num; in pvr_fw_find_layout_entry()
65 const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries; in pvr_fw_find_private_data()
66 u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num; in pvr_fw_find_private_data()
92 const struct firmware *firmware = pvr_dev->fw_dev.firmware; in pvr_fw_validate()
160 pvr_dev->fw_dev.header = header; in pvr_fw_validate()
161 pvr_dev->fw_dev.layout_entries = layout_entries; in pvr_fw_validate()
169 const struct firmware *firmware = pvr_dev->fw_dev.firmware; in pvr_fw_get_device_info()
175 fw_offset = (firmware->size - SZ_4K) - pvr_dev->fw_dev.header->device_info_size; in pvr_fw_get_device_info()
193 const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries; in layout_get_sizes()
194 u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num; in layout_get_sizes()
195 struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem; in layout_get_sizes()
230 const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries; in pvr_fw_find_mmu_segment()
231 u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num; in pvr_fw_find_mmu_segment()
284 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_create_fwif_connection_ctl() local
286 fw_dev->fwif_connection_ctl = in pvr_fw_create_fwif_connection_ctl()
288 fw_dev->fw_heap_info.config_offset + in pvr_fw_create_fwif_connection_ctl()
290 sizeof(*fw_dev->fwif_connection_ctl), in pvr_fw_create_fwif_connection_ctl()
293 &fw_dev->mem.fwif_connection_ctl_obj); in pvr_fw_create_fwif_connection_ctl()
294 if (IS_ERR(fw_dev->fwif_connection_ctl)) { in pvr_fw_create_fwif_connection_ctl()
297 return PTR_ERR(fw_dev->fwif_connection_ctl); in pvr_fw_create_fwif_connection_ctl()
306 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_fini_fwif_connection_ctl() local
308 pvr_fw_object_unmap_and_destroy(fw_dev->mem.fwif_connection_ctl_obj); in pvr_fw_fini_fwif_connection_ctl()
316 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in fw_osinit_init() local
317 struct pvr_fw_mem *fw_mem = &fw_dev->mem; in fw_osinit_init()
345 struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem; in fw_osdata_init()
364 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in fw_sysinit_init() local
365 struct pvr_fw_mem *fw_mem = &fw_dev->mem; in fw_sysinit_init()
378 pvr_fw_object_get_fw_addr(fw_dev->fw_trace.tracebuf_ctrl_obj, in fw_sysinit_init()
457 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_create_structures() local
458 struct pvr_fw_mem *fw_mem = &fw_dev->mem; in pvr_fw_create_structures()
461 fw_dev->power_sync = pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_dev->power_sync), in pvr_fw_create_structures()
464 if (IS_ERR(fw_dev->power_sync)) { in pvr_fw_create_structures()
466 return PTR_ERR(fw_dev->power_sync); in pvr_fw_create_structures()
469 fw_dev->hwrinfobuf = pvr_fw_object_create_and_map(pvr_dev, sizeof(*fw_dev->hwrinfobuf), in pvr_fw_create_structures()
472 if (IS_ERR(fw_dev->hwrinfobuf)) { in pvr_fw_create_structures()
475 err = PTR_ERR(fw_dev->hwrinfobuf); in pvr_fw_create_structures()
488 fw_dev->fwif_sysdata = pvr_fw_object_create_and_map(pvr_dev, in pvr_fw_create_structures()
489 sizeof(*fw_dev->fwif_sysdata), in pvr_fw_create_structures()
493 if (IS_ERR(fw_dev->fwif_sysdata)) { in pvr_fw_create_structures()
495 err = PTR_ERR(fw_dev->fwif_sysdata); in pvr_fw_create_structures()
527 fw_dev->fwif_osdata = pvr_fw_object_create_and_map(pvr_dev, in pvr_fw_create_structures()
528 sizeof(*fw_dev->fwif_osdata), in pvr_fw_create_structures()
532 if (IS_ERR(fw_dev->fwif_osdata)) { in pvr_fw_create_structures()
534 err = PTR_ERR(fw_dev->fwif_osdata); in pvr_fw_create_structures()
538 fw_dev->fwif_osinit = in pvr_fw_create_structures()
540 fw_dev->fw_heap_info.config_offset + in pvr_fw_create_structures()
542 sizeof(*fw_dev->fwif_osinit), in pvr_fw_create_structures()
545 if (IS_ERR(fw_dev->fwif_osinit)) { in pvr_fw_create_structures()
547 err = PTR_ERR(fw_dev->fwif_osinit); in pvr_fw_create_structures()
551 fw_dev->fwif_sysinit = in pvr_fw_create_structures()
553 fw_dev->fw_heap_info.config_offset + in pvr_fw_create_structures()
555 sizeof(*fw_dev->fwif_sysinit), in pvr_fw_create_structures()
558 if (IS_ERR(fw_dev->fwif_sysinit)) { in pvr_fw_create_structures()
560 err = PTR_ERR(fw_dev->fwif_sysinit); in pvr_fw_create_structures()
602 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_destroy_structures() local
603 struct pvr_fw_mem *fw_mem = &fw_dev->mem; in pvr_fw_destroy_structures()
633 struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem; in pvr_fw_process()
634 const u8 *fw = pvr_dev->fw_dev.firmware->data; in pvr_fw_process()
665 if (pvr_dev->fw_dev.defs->has_fixed_data_addr) { in pvr_fw_process()
666 u32 base_addr = private_data->base_addr & pvr_dev->fw_dev.fw_heap_info.offset_mask; in pvr_fw_process()
729 err = pvr_dev->fw_dev.defs->fw_process(pvr_dev, fw, in pvr_fw_process()
811 struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem; in pvr_fw_reinit_code_data()
842 struct pvr_fw_mem *fw_mem = &pvr_dev->fw_dev.mem; in pvr_fw_cleanup()
871 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_wait_for_fw_boot() local
874 if (READ_ONCE(fw_dev->fwif_sysinit->firmware_started)) in pvr_wait_for_fw_boot()
890 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_heap_info_init() local
892 fw_dev->fw_heap_info.gpu_addr = PVR_ROGUE_FW_MAIN_HEAP_BASE; in pvr_fw_heap_info_init()
893 fw_dev->fw_heap_info.log2_size = log2_size; in pvr_fw_heap_info_init()
894 fw_dev->fw_heap_info.reserved_size = reserved_size; in pvr_fw_heap_info_init()
895 fw_dev->fw_heap_info.raw_size = 1 << fw_dev->fw_heap_info.log2_size; in pvr_fw_heap_info_init()
896 fw_dev->fw_heap_info.offset_mask = fw_dev->fw_heap_info.raw_size - 1; in pvr_fw_heap_info_init()
897 fw_dev->fw_heap_info.config_offset = fw_dev->fw_heap_info.raw_size - in pvr_fw_heap_info_init()
899 fw_dev->fw_heap_info.size = fw_dev->fw_heap_info.raw_size - in pvr_fw_heap_info_init()
949 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_init() local
952 if (fw_dev->processor_type >= PVR_FW_PROCESSOR_TYPE_COUNT) in pvr_fw_init()
955 fw_dev->defs = fw_defs[fw_dev->processor_type]; in pvr_fw_init()
957 err = fw_dev->defs->init(pvr_dev); in pvr_fw_init()
961 drm_mm_init(&fw_dev->fw_mm, ROGUE_FW_HEAP_BASE, fw_dev->fw_heap_info.raw_size); in pvr_fw_init()
962 fw_dev->fw_mm_base = ROGUE_FW_HEAP_BASE; in pvr_fw_init()
963 spin_lock_init(&fw_dev->fw_mm_lock); in pvr_fw_init()
965 INIT_LIST_HEAD(&fw_dev->fw_objs.list); in pvr_fw_init()
966 err = drmm_mutex_init(from_pvr_device(pvr_dev), &fw_dev->fw_objs.lock); in pvr_fw_init()
1006 fw_dev->booted = true; in pvr_fw_init()
1029 drm_mm_takedown(&fw_dev->fw_mm); in pvr_fw_init()
1031 if (fw_dev->defs->fini) in pvr_fw_init()
1032 fw_dev->defs->fini(pvr_dev); in pvr_fw_init()
1044 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_fini() local
1046 fw_dev->booted = false; in pvr_fw_fini()
1059 mutex_lock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_fini()
1060 WARN_ON(!list_empty(&pvr_dev->fw_dev.fw_objs.list)); in pvr_fw_fini()
1061 mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_fini()
1063 drm_mm_takedown(&fw_dev->fw_mm); in pvr_fw_fini()
1065 if (fw_dev->defs->fini) in pvr_fw_fini()
1066 fw_dev->defs->fini(pvr_dev); in pvr_fw_fini()
1177 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_object_fw_map() local
1181 spin_lock(&fw_dev->fw_mm_lock); in pvr_fw_object_fw_map()
1193 err = drm_mm_insert_node_in_range(&fw_dev->fw_mm, &fw_obj->fw_mm_node, in pvr_fw_object_fw_map()
1195 fw_dev->fw_heap_info.gpu_addr, in pvr_fw_object_fw_map()
1196 fw_dev->fw_heap_info.gpu_addr + in pvr_fw_object_fw_map()
1197 fw_dev->fw_heap_info.size, 0); in pvr_fw_object_fw_map()
1203 err = drm_mm_reserve_node(&fw_dev->fw_mm, &fw_obj->fw_mm_node); in pvr_fw_object_fw_map()
1208 spin_unlock(&fw_dev->fw_mm_lock); in pvr_fw_object_fw_map()
1211 err = fw_dev->defs->vm_map(pvr_dev, fw_obj); in pvr_fw_object_fw_map()
1215 fw_obj->fw_addr_offset = (u32)(fw_obj->fw_mm_node.start - fw_dev->fw_mm_base); in pvr_fw_object_fw_map()
1220 spin_lock(&fw_dev->fw_mm_lock); in pvr_fw_object_fw_map()
1224 spin_unlock(&fw_dev->fw_mm_lock); in pvr_fw_object_fw_map()
1243 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_object_fw_unmap() local
1245 fw_dev->defs->vm_unmap(pvr_dev, fw_obj); in pvr_fw_object_fw_unmap()
1247 spin_lock(&fw_dev->fw_mm_lock); in pvr_fw_object_fw_unmap()
1250 spin_unlock(&fw_dev->fw_mm_lock); in pvr_fw_object_fw_unmap()
1256 spin_unlock(&fw_dev->fw_mm_lock); in pvr_fw_object_fw_unmap()
1304 mutex_lock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_object_create_and_map_common()
1305 list_add_tail(&fw_obj->node, &pvr_dev->fw_dev.fw_objs.list); in pvr_fw_object_create_and_map_common()
1306 mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_object_create_and_map_common()
1415 u64 dev_addr = pvr_dev->fw_dev.fw_mm_base + dev_offset; in pvr_fw_object_create_and_map_offset()
1431 mutex_lock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_object_destroy()
1433 mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_object_destroy()
1459 *fw_addr_out = pvr_dev->fw_dev.defs->get_fw_addr_with_offset(fw_obj, offset); in pvr_fw_object_get_fw_addr_offset()
1466 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_fw_obj_get_gpu_addr() local
1468 return fw_dev->fw_heap_info.gpu_addr + fw_obj->fw_addr_offset; in pvr_fw_obj_get_gpu_addr()
1489 mutex_lock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_hard_reset()
1491 list_for_each(pos, &pvr_dev->fw_dev.fw_objs.list) { in pvr_fw_hard_reset()
1507 mutex_unlock(&pvr_dev->fw_dev.fw_objs.lock); in pvr_fw_hard_reset()