Lines Matching refs:msm_gpu
48 int (*get_param)(struct msm_gpu *gpu, struct msm_context *ctx,
50 int (*set_param)(struct msm_gpu *gpu, struct msm_context *ctx,
52 int (*hw_init)(struct msm_gpu *gpu);
57 int (*ucode_load)(struct msm_gpu *gpu);
59 int (*pm_suspend)(struct msm_gpu *gpu);
60 int (*pm_resume)(struct msm_gpu *gpu);
61 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);
62 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
63 irqreturn_t (*irq)(struct msm_gpu *irq);
64 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
65 void (*recover)(struct msm_gpu *gpu);
66 void (*destroy)(struct msm_gpu *gpu);
69 void (*show)(struct msm_gpu *gpu, struct msm_gpu_state *state,
72 void (*debugfs_init)(struct msm_gpu *gpu, struct drm_minor *minor);
75 u64 (*gpu_busy)(struct msm_gpu *gpu, unsigned long *out_sample_rate);
76 struct msm_gpu_state *(*gpu_state_get)(struct msm_gpu *gpu);
78 unsigned long (*gpu_get_freq)(struct msm_gpu *gpu);
80 void (*gpu_set_freq)(struct msm_gpu *gpu, struct dev_pm_opp *opp,
82 struct drm_gpuvm *(*create_vm)(struct msm_gpu *gpu, struct platform_device *pdev);
83 struct drm_gpuvm *(*create_private_vm)(struct msm_gpu *gpu, bool kernel_managed);
84 uint32_t (*get_rptr)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
93 bool (*progress)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
173 struct msm_gpu { struct
290 static inline struct msm_gpu *dev_to_gpu(struct device *dev) in dev_to_gpu() argument
297 return container_of(adreno_smmu, struct msm_gpu, adreno_smmu); in dev_to_gpu()
308 static inline bool msm_gpu_active(struct msm_gpu *gpu) in msm_gpu_active()
509 static inline int msm_gpu_convert_priority(struct msm_gpu *gpu, int prio, in msm_gpu_convert_priority()
614 static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data) in gpu_write()
619 static inline u32 gpu_read(struct msm_gpu *gpu, u32 reg) in gpu_read()
624 static inline void gpu_rmw(struct msm_gpu *gpu, u32 reg, u32 mask, u32 or) in gpu_rmw()
629 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 reg) in gpu_read64()
653 static inline void gpu_write64(struct msm_gpu *gpu, u32 reg, u64 val) in gpu_write64()
660 int msm_gpu_pm_suspend(struct msm_gpu *gpu);
661 int msm_gpu_pm_resume(struct msm_gpu *gpu);
663 void msm_gpu_show_fdinfo(struct msm_gpu *gpu, struct msm_context *ctx,
679 int msm_context_set_sysprof(struct msm_context *ctx, struct msm_gpu *gpu, int sysprof);
694 void msm_devfreq_init(struct msm_gpu *gpu);
695 void msm_devfreq_cleanup(struct msm_gpu *gpu);
696 void msm_devfreq_resume(struct msm_gpu *gpu);
697 void msm_devfreq_suspend(struct msm_gpu *gpu);
698 void msm_devfreq_boost(struct msm_gpu *gpu, unsigned factor);
699 void msm_devfreq_active(struct msm_gpu *gpu);
700 void msm_devfreq_idle(struct msm_gpu *gpu);
702 int msm_gpu_hw_init(struct msm_gpu *gpu);
704 void msm_gpu_perfcntr_start(struct msm_gpu *gpu);
705 void msm_gpu_perfcntr_stop(struct msm_gpu *gpu);
706 int msm_gpu_perfcntr_sample(struct msm_gpu *gpu, uint32_t *activetime,
709 void msm_gpu_retire(struct msm_gpu *gpu);
710 void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit);
713 struct msm_gpu *gpu, const struct msm_gpu_funcs *funcs,
717 msm_gpu_create_private_vm(struct msm_gpu *gpu, struct task_struct *task,
720 void msm_gpu_cleanup(struct msm_gpu *gpu);
722 struct msm_gpu *adreno_load_gpu(struct drm_device *dev);
733 static inline struct msm_gpu_state *msm_gpu_crashstate_get(struct msm_gpu *gpu) in msm_gpu_crashstate_get()
749 static inline void msm_gpu_crashstate_put(struct msm_gpu *gpu) in msm_gpu_crashstate_put()
761 void msm_gpu_fault_crashstate_capture(struct msm_gpu *gpu, struct msm_gpu_fault_info *fault_info);