Lines Matching refs:trace
50 #define trace(fmt, args...) bioslog(TRACE, fmt, ##args) macro
324 trace("auxch read failed with %d\n", ret); in init_rdauxr()
337 trace("auxch write failed with %d\n", ret); in init_wrauxr()
487 trace("\t[0x%02x] (R[0x%06x] & 0x%08x) == 0x%08x\n", in init_condition_met()
504 trace("\t[0x%02x] (0x%04x[0x%02x] & 0x%02x) == 0x%02x\n", in init_io_condition_met()
598 trace("RESERVED 0x%02x\t", opcode); in init_reserved()
612 trace("DONE\n"); in init_done()
632 trace("IO_RESTRICT_PROG\tR[0x%06x] = " in init_io_restrict_prog()
642 trace("\t0x%08x *\n", data); in init_io_restrict_prog()
645 trace("\t0x%08x\n", data); in init_io_restrict_prog()
650 trace("}]\n"); in init_io_restrict_prog()
664 trace("REPEAT\t0x%02x\n", count); in init_repeat()
673 trace("REPEAT\t0x%02x\n", count); in init_repeat()
696 trace("IO_RESTRICT_PLL\tR[0x%06x] =PLL= " in init_io_restrict_pll()
706 trace("\t%dkHz *\n", freq); in init_io_restrict_pll()
711 trace("\t%dkHz\n", freq); in init_io_restrict_pll()
716 trace("}]\n"); in init_io_restrict_pll()
726 trace("END_REPEAT\n"); in init_end_repeat()
751 trace("COPY\t0x%04x[0x%02x] &= 0x%02x |= " in init_copy()
769 trace("NOT\n"); in init_not()
784 trace("IO_FLAG_CONDITION\t0x%02x\n", cond); in init_io_flag_condition()
805 trace("GENERIC_CONDITION\t0x%02x 0x%02x\n", cond, size); in init_generic_condition()
855 trace("IO_MASK_OR\t0x03d4[0x%02x] &= ~(1 << 0x%02x)\n", index, or); in init_io_mask_or()
874 trace("IO_OR\t0x03d4[0x%02x] |= (1 << 0x%02x)\n", index, or); in init_io_or()
892 trace("ANDN_REG\tR[0x%06x] &= ~0x%08x\n", reg, mask); in init_andn_reg()
909 trace("OR_REG\tR[0x%06x] |= 0x%08x\n", reg, mask); in init_or_reg()
929 trace("INDEX_ADDRESS_LATCHED\tR[0x%06x] : R[0x%06x]\n", creg, dreg); in init_idx_addr_latched()
930 trace("\tCTRL &= 0x%08x |= 0x%08x\n", mask, data); in init_idx_addr_latched()
937 trace("\t[0x%02x] = 0x%02x\n", iaddr, idata); in init_idx_addr_latched()
961 trace("IO_RESTRICT_PLL2\t" in init_io_restrict_pll2()
970 trace("\t%dkHz *\n", freq); in init_io_restrict_pll2()
973 trace("\t%dkHz\n", freq); in init_io_restrict_pll2()
977 trace("}]\n"); in init_io_restrict_pll2()
991 trace("PLL2\tR[0x%06x] =PLL= %dkHz\n", reg, freq); in init_pll2()
1009 trace("I2C_BYTE\tI2C[0x%02x][0x%02x]\n", index, addr); in init_i2c_byte()
1018 trace("\t[0x%02x] &= 0x%02x |= 0x%02x\n", reg, mask, data); in init_i2c_byte()
1040 trace("ZM_I2C_BYTE\tI2C[0x%02x][0x%02x]\n", index, addr); in init_zm_i2c_byte()
1047 trace("\t[0x%02x] = 0x%02x\n", reg, data); in init_zm_i2c_byte()
1067 trace("ZM_I2C\tI2C[0x%02x][0x%02x]\n", index, addr); in init_zm_i2c()
1072 trace("\t0x%02x\n", data[i]); in init_zm_i2c()
1102 trace("TMDS\tT[0x%02x][0x%02x] &= 0x%02x |= 0x%02x\n", in init_tmds()
1126 trace("TMDS_ZM_GROUP\tT[0x%02x]\n", tmds); in init_zm_tmds_group()
1133 trace("\t[0x%02x] = 0x%02x\n", addr, data); in init_zm_tmds_group()
1155 trace("CR_INDEX_ADDR C[%02x] C[%02x]\n", addr0, addr1); in init_cr_idx_adr_latch()
1162 trace("\t\t[0x%02x] = 0x%02x\n", base, data); in init_cr_idx_adr_latch()
1184 trace("CR\t\tC[0x%02x] &= 0x%02x |= 0x%02x\n", addr, mask, data); in init_cr()
1202 trace("ZM_CR\tC[0x%02x] = 0x%02x\n", addr, data); in init_zm_cr()
1218 trace("ZM_CR_GROUP\n"); in init_zm_cr_group()
1225 trace("\t\tC[0x%02x] = 0x%02x\n", addr, data); in init_zm_cr_group()
1244 trace("CONDITION_TIME\t0x%02x 0x%02x\n", cond, retry); in init_condition_time()
1269 trace("LTIME\t0x%04x\n", msec); in init_ltime()
1287 trace("ZM_REG_SEQUENCE\t0x%02x\n", count); in init_zm_reg_sequence()
1293 trace("\t\tR[0x%06x] = 0x%08x\n", base, data); in init_zm_reg_sequence()
1313 trace("PLL_INDIRECT\tR[0x%06x] =PLL= VBIOS[%04x] = %dkHz\n", in init_pll_indirect()
1332 trace("ZM_REG_INDIRECT\tR[0x%06x] = VBIOS[0x%04x] = 0x%08x\n", in init_zm_reg_indirect()
1350 trace("SUB_DIRECT\t0x%04x\n", addr); in init_sub_direct()
1375 trace("JUMP\t0x%04x\n", offset); in init_jump()
1398 trace("I2C_IF\tI2C[0x%02x][0x%02x][0x%02x] & 0x%02x == 0x%02x\n", in init_i2c_if()
1426 trace("COPY_NV_REG\tR[0x%06x] &= 0x%08x |= " in init_copy_nv_reg()
1448 trace("ZM_INDEX_IO\tI[0x%04x][0x%02x] = 0x%02x\n", port, index, data); in init_zm_index_io()
1463 trace("COMPUTE_MEM\n"); in init_compute_mem()
1485 trace("RESET\tR[0x%08x] = 0x%08x, 0x%08x", reg, data1, data2); in init_reset()
1519 trace("CONFIGURE_MEM\n"); in init_configure_mem()
1568 trace("CONFIGURE_CLK\n"); in init_configure_clk()
1602 trace("CONFIGURE_PREINIT\n"); in init_configure_preinit()
1631 trace("IO\t\tI[0x%04x] &= 0x%02x |= 0x%02x\n", port, mask, data); in init_io()
1669 trace("SUB\t0x%02x\n", index); in init_sub()
1696 trace("RAM_CONDITION\t" in init_ram_condition()
1716 trace("NV_REG\tR[0x%06x] &= 0x%08x |= 0x%08x\n", reg, mask, data); in init_nv_reg()
1733 trace("MACRO\t0x%02x\n", macro); in init_macro()
1739 trace("\t\tR[0x%06x] = 0x%08x\n", addr, data); in init_macro()
1753 trace("RESUME\n"); in init_resume()
1769 trace("STRAP_CONDITION\t(R[0x101000] & 0x%08x) == 0x%08x\n", mask, value); in init_strap_condition()
1786 trace("TIME\t0x%04x\n", usec); in init_time()
1807 trace("CONDITION\t0x%02x\n", cond); in init_condition()
1824 trace("IO_CONDITION\t0x%02x\n", cond); in init_io_condition()
1842 trace("ZM_REG\tR[0x%06x] = 0x%04x\n", addr, data); in init_zm_reg16()
1862 trace("INDEX_IO\tI[0x%04x][0x%02x] &= 0x%02x |= 0x%02x\n", in init_index_io()
1881 trace("PLL\tR[0x%06x] =PLL= %dkHz\n", reg, freq); in init_pll()
1898 trace("ZM_REG\tR[0x%06x] = 0x%08x\n", addr, data); in init_zm_reg()
1920 trace("RAM_RESTRICT_PLL\t0x%02x\n", type); in init_ram_restrict_pll()
1927 trace("%dkHz *\n", freq); in init_ram_restrict_pll()
1930 trace("%dkHz\n", freq); in init_ram_restrict_pll()
1944 trace("RESET_BEGUN\n"); in init_reset_begun()
1955 trace("RESET_END\n"); in init_reset_end()
1968 trace("GPIO\n"); in init_gpio()
1990 trace("RAM_RESTRICT_ZM_REG_GROUP\t" in init_ram_restrict_zm_reg_group()
1995 trace("\tR[0x%06x] = {\n", addr); in init_ram_restrict_zm_reg_group()
2000 trace("\t\t0x%08x *\n", data); in init_ram_restrict_zm_reg_group()
2003 trace("\t\t0x%08x\n", data); in init_ram_restrict_zm_reg_group()
2008 trace("\t}\n"); in init_ram_restrict_zm_reg_group()
2024 trace("COPY_ZM_REG\tR[0x%06x] = R[0x%06x]\n", dreg, sreg); in init_copy_zm_reg()
2041 trace("ZM_REG_GROUP\tR[0x%06x] =\n", addr); in init_zm_reg_group()
2046 trace("\t0x%08x\n", data); in init_zm_reg_group()
2069 trace("INIT_XLAT\tR[0x%06x] &= 0x%08x |= " in init_xlat()
2093 trace("ZM_MASK_ADD\tR[0x%06x] &= 0x%08x += 0x%08x\n", addr, mask, add); in init_zm_mask_add()
2112 trace("AUXCH\tAUX[0x%08x] 0x%02x\n", addr, count); in init_auxch()
2118 trace("\tAUX[0x%08x] &= 0x%02x |= 0x%02x\n", addr, mask, data); in init_auxch()
2136 trace("ZM_AUXCH\tAUX[0x%08x] 0x%02x\n", addr, count); in init_zm_auxch()
2141 trace("\tAUX[0x%08x] = 0x%02x\n", addr, data); in init_zm_auxch()
2163 trace("I2C_LONG_IF\t" in init_i2c_long_if()
2200 trace("GPIO_NE\t"); in init_gpio_ne()
2214 trace("\tFUNC[0x%02x]", func.func); in init_gpio_ne()