Lines Matching refs:ix
541 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_divider_value() local
548 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_set_divider_value()
551 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_set_divider_value()
558 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix); in trinity_set_divider_value()
561 WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value); in trinity_set_divider_value()
568 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_ds_dividers() local
570 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix); in trinity_set_ds_dividers()
573 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value); in trinity_set_ds_dividers()
580 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_ss_dividers() local
582 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix); in trinity_set_ss_dividers()
585 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value); in trinity_set_ss_dividers()
593 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_vid() local
595 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_set_vid()
598 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_set_vid()
600 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_set_vid()
603 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_set_vid()
610 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_allos_gnb_slow() local
612 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix); in trinity_set_allos_gnb_slow()
615 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value); in trinity_set_allos_gnb_slow()
622 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_force_nbp_state() local
624 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix); in trinity_set_force_nbp_state()
627 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value); in trinity_set_force_nbp_state()
634 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_display_wm() local
636 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix); in trinity_set_display_wm()
639 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value); in trinity_set_display_wm()
646 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_vce_wm() local
648 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix); in trinity_set_vce_wm()
651 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value); in trinity_set_vce_wm()
658 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_set_at() local
660 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix); in trinity_set_at()
663 WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value); in trinity_set_at()
689 u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE; in trinity_power_level_enable_disable() local
691 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix); in trinity_power_level_enable_disable()
695 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value); in trinity_power_level_enable_disable()